#ifndef INCLUDED_CYFITTERIAR_INC
#define INCLUDED_CYFITTERIAR_INC
    INCLUDE cydeviceiar_trm.inc

/* Gain */
Gain__0__DR EQU CYREG_GPIO_PRT2_DR
Gain__0__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
Gain__0__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
Gain__0__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
Gain__0__HSIOM EQU CYREG_HSIOM_PORT_SEL2
Gain__0__HSIOM_MASK EQU 0x000F0000
Gain__0__HSIOM_SHIFT EQU 16
Gain__0__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
Gain__0__INTR EQU CYREG_GPIO_PRT2_INTR
Gain__0__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
Gain__0__INTSTAT EQU CYREG_GPIO_PRT2_INTR
Gain__0__MASK EQU 0x10
Gain__0__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
Gain__0__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
Gain__0__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
Gain__0__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
Gain__0__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
Gain__0__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
Gain__0__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
Gain__0__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
Gain__0__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
Gain__0__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
Gain__0__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
Gain__0__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
Gain__0__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
Gain__0__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
Gain__0__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
Gain__0__PC EQU CYREG_GPIO_PRT2_PC
Gain__0__PC2 EQU CYREG_GPIO_PRT2_PC2
Gain__0__PORT EQU 2
Gain__0__PS EQU CYREG_GPIO_PRT2_PS
Gain__0__SHIFT EQU 4
Gain__DR EQU CYREG_GPIO_PRT2_DR
Gain__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
Gain__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
Gain__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
Gain__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
Gain__INTR EQU CYREG_GPIO_PRT2_INTR
Gain__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
Gain__INTSTAT EQU CYREG_GPIO_PRT2_INTR
Gain__MASK EQU 0x10
Gain__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
Gain__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
Gain__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
Gain__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
Gain__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
Gain__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
Gain__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
Gain__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
Gain__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
Gain__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
Gain__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
Gain__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
Gain__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
Gain__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
Gain__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
Gain__PC EQU CYREG_GPIO_PRT2_PC
Gain__PC2 EQU CYREG_GPIO_PRT2_PC2
Gain__PORT EQU 2
Gain__PS EQU CYREG_GPIO_PRT2_PS
Gain__SHIFT EQU 4

/* A_out */
A_out__0__DR EQU CYREG_GPIO_PRT2_DR
A_out__0__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
A_out__0__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
A_out__0__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
A_out__0__HSIOM EQU CYREG_HSIOM_PORT_SEL2
A_out__0__HSIOM_MASK EQU 0x0000F000
A_out__0__HSIOM_SHIFT EQU 12
A_out__0__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
A_out__0__INTR EQU CYREG_GPIO_PRT2_INTR
A_out__0__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
A_out__0__INTSTAT EQU CYREG_GPIO_PRT2_INTR
A_out__0__MASK EQU 0x08
A_out__0__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
A_out__0__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
A_out__0__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
A_out__0__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
A_out__0__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
A_out__0__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
A_out__0__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
A_out__0__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
A_out__0__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
A_out__0__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
A_out__0__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
A_out__0__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
A_out__0__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
A_out__0__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
A_out__0__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
A_out__0__PC EQU CYREG_GPIO_PRT2_PC
A_out__0__PC2 EQU CYREG_GPIO_PRT2_PC2
A_out__0__PORT EQU 2
A_out__0__PS EQU CYREG_GPIO_PRT2_PS
A_out__0__SHIFT EQU 3
A_out__DR EQU CYREG_GPIO_PRT2_DR
A_out__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
A_out__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
A_out__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
A_out__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
A_out__INTR EQU CYREG_GPIO_PRT2_INTR
A_out__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
A_out__INTSTAT EQU CYREG_GPIO_PRT2_INTR
A_out__MASK EQU 0x08
A_out__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
A_out__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
A_out__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
A_out__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
A_out__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
A_out__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
A_out__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
A_out__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
A_out__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
A_out__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
A_out__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
A_out__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
A_out__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
A_out__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
A_out__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
A_out__PC EQU CYREG_GPIO_PRT2_PC
A_out__PC2 EQU CYREG_GPIO_PRT2_PC2
A_out__PORT EQU 2
A_out__PS EQU CYREG_GPIO_PRT2_PS
A_out__SHIFT EQU 3

/* CyBle_bless_isr */
CyBle_bless_isr__INTC_CLR_EN_REG EQU CYREG_CM0_ICER
CyBle_bless_isr__INTC_CLR_PD_REG EQU CYREG_CM0_ICPR
CyBle_bless_isr__INTC_MASK EQU 0x1000
CyBle_bless_isr__INTC_NUMBER EQU 12
CyBle_bless_isr__INTC_PRIOR_MASK EQU 0xC0
CyBle_bless_isr__INTC_PRIOR_NUM EQU 2
CyBle_bless_isr__INTC_PRIOR_REG EQU CYREG_CM0_IPR3
CyBle_bless_isr__INTC_SET_EN_REG EQU CYREG_CM0_ISER
CyBle_bless_isr__INTC_SET_PD_REG EQU CYREG_CM0_ISPR

/* CyBle_cy_m0s8_ble */
CyBle_cy_m0s8_ble__ADC_BUMP1 EQU CYREG_BLE_BLERD_ADC_BUMP1
CyBle_cy_m0s8_ble__ADC_BUMP2 EQU CYREG_BLE_BLERD_ADC_BUMP2
CyBle_cy_m0s8_ble__ADV_CH_TX_POWER EQU CYREG_BLE_BLELL_ADV_CH_TX_POWER
CyBle_cy_m0s8_ble__ADV_CONFIG EQU CYREG_BLE_BLELL_ADV_CONFIG
CyBle_cy_m0s8_ble__ADV_INTERVAL_TIMEOUT EQU CYREG_BLE_BLELL_ADV_INTERVAL_TIMEOUT
CyBle_cy_m0s8_ble__ADV_INTR EQU CYREG_BLE_BLELL_ADV_INTR
CyBle_cy_m0s8_ble__ADV_NEXT_INSTANT EQU CYREG_BLE_BLELL_ADV_NEXT_INSTANT
CyBle_cy_m0s8_ble__ADV_PARAMS EQU CYREG_BLE_BLELL_ADV_PARAMS
CyBle_cy_m0s8_ble__ADV_SCN_RSP_TX_FIFO EQU CYREG_BLE_BLELL_ADV_SCN_RSP_TX_FIFO
CyBle_cy_m0s8_ble__ADV_TX_DATA_FIFO EQU CYREG_BLE_BLELL_ADV_TX_DATA_FIFO
CyBle_cy_m0s8_ble__AGC EQU CYREG_BLE_BLERD_AGC
CyBle_cy_m0s8_ble__BALUN EQU CYREG_BLE_BLERD_BALUN
CyBle_cy_m0s8_ble__BB_BUMP1 EQU CYREG_BLE_BLERD_BB_BUMP1
CyBle_cy_m0s8_ble__BB_BUMP2 EQU CYREG_BLE_BLERD_BB_BUMP2
CyBle_cy_m0s8_ble__BB_XO EQU CYREG_BLE_BLERD_BB_XO
CyBle_cy_m0s8_ble__BB_XO_CAPTRIM EQU CYREG_BLE_BLERD_BB_XO_CAPTRIM
CyBle_cy_m0s8_ble__CE_CNFG_STS_REGISTER EQU CYREG_BLE_BLELL_CE_CNFG_STS_REGISTER
CyBle_cy_m0s8_ble__CE_LENGTH EQU CYREG_BLE_BLELL_CE_LENGTH
CyBle_cy_m0s8_ble__CFG_1_FCAL EQU CYREG_BLE_BLERD_CFG_1_FCAL
CyBle_cy_m0s8_ble__CFG_2_FCAL EQU CYREG_BLE_BLERD_CFG_2_FCAL
CyBle_cy_m0s8_ble__CFG_3_FCAL EQU CYREG_BLE_BLERD_CFG_3_FCAL
CyBle_cy_m0s8_ble__CFG_4_FCAL EQU CYREG_BLE_BLERD_CFG_4_FCAL
CyBle_cy_m0s8_ble__CFG_5_FCAL EQU CYREG_BLE_BLERD_CFG_5_FCAL
CyBle_cy_m0s8_ble__CFG_6_FCAL EQU CYREG_BLE_BLERD_CFG_6_FCAL
CyBle_cy_m0s8_ble__CFG1 EQU CYREG_BLE_BLERD_CFG1
CyBle_cy_m0s8_ble__CFG2 EQU CYREG_BLE_BLERD_CFG2
CyBle_cy_m0s8_ble__CFGCTRL EQU CYREG_BLE_BLERD_CFGCTRL
CyBle_cy_m0s8_ble__CLOCK_CONFIG EQU CYREG_BLE_BLELL_CLOCK_CONFIG
CyBle_cy_m0s8_ble__COMMAND_REGISTER EQU CYREG_BLE_BLELL_COMMAND_REGISTER
CyBle_cy_m0s8_ble__CONN_CE_COUNTER EQU CYREG_BLE_BLELL_CONN_CE_COUNTER
CyBle_cy_m0s8_ble__CONN_CE_INSTANT EQU CYREG_BLE_BLELL_CONN_CE_INSTANT
CyBle_cy_m0s8_ble__CONN_CH_TX_POWER EQU CYREG_BLE_BLELL_CONN_CH_TX_POWER
CyBle_cy_m0s8_ble__CONN_CONFIG EQU CYREG_BLE_BLELL_CONN_CONFIG
CyBle_cy_m0s8_ble__CONN_INDEX EQU CYREG_BLE_BLELL_CONN_INDEX
CyBle_cy_m0s8_ble__CONN_INTERVAL EQU CYREG_BLE_BLELL_CONN_INTERVAL
CyBle_cy_m0s8_ble__CONN_INTR EQU CYREG_BLE_BLELL_CONN_INTR
CyBle_cy_m0s8_ble__CONN_INTR_MASK EQU CYREG_BLE_BLELL_CONN_INTR_MASK
CyBle_cy_m0s8_ble__CONN_PARAM1 EQU CYREG_BLE_BLELL_CONN_PARAM1
CyBle_cy_m0s8_ble__CONN_PARAM2 EQU CYREG_BLE_BLELL_CONN_PARAM2
CyBle_cy_m0s8_ble__CONN_REQ_WORD0 EQU CYREG_BLE_BLELL_CONN_REQ_WORD0
CyBle_cy_m0s8_ble__CONN_REQ_WORD1 EQU CYREG_BLE_BLELL_CONN_REQ_WORD1
CyBle_cy_m0s8_ble__CONN_REQ_WORD10 EQU CYREG_BLE_BLELL_CONN_REQ_WORD10
CyBle_cy_m0s8_ble__CONN_REQ_WORD11 EQU CYREG_BLE_BLELL_CONN_REQ_WORD11
CyBle_cy_m0s8_ble__CONN_REQ_WORD2 EQU CYREG_BLE_BLELL_CONN_REQ_WORD2
CyBle_cy_m0s8_ble__CONN_REQ_WORD3 EQU CYREG_BLE_BLELL_CONN_REQ_WORD3
CyBle_cy_m0s8_ble__CONN_REQ_WORD4 EQU CYREG_BLE_BLELL_CONN_REQ_WORD4
CyBle_cy_m0s8_ble__CONN_REQ_WORD5 EQU CYREG_BLE_BLELL_CONN_REQ_WORD5
CyBle_cy_m0s8_ble__CONN_REQ_WORD6 EQU CYREG_BLE_BLELL_CONN_REQ_WORD6
CyBle_cy_m0s8_ble__CONN_REQ_WORD7 EQU CYREG_BLE_BLELL_CONN_REQ_WORD7
CyBle_cy_m0s8_ble__CONN_REQ_WORD8 EQU CYREG_BLE_BLELL_CONN_REQ_WORD8
CyBle_cy_m0s8_ble__CONN_REQ_WORD9 EQU CYREG_BLE_BLELL_CONN_REQ_WORD9
CyBle_cy_m0s8_ble__CONN_RXMEM_BASE_ADDR EQU CYREG_BLE_BLELL_CONN_RXMEM_BASE_ADDR
CyBle_cy_m0s8_ble__CONN_STATUS EQU CYREG_BLE_BLELL_CONN_STATUS
CyBle_cy_m0s8_ble__CONN_TXMEM_BASE_ADDR EQU CYREG_BLE_BLELL_CONN_TXMEM_BASE_ADDR
CyBle_cy_m0s8_ble__CONN_UPDATE_NEW_INTERVAL EQU CYREG_BLE_BLELL_CONN_UPDATE_NEW_INTERVAL
CyBle_cy_m0s8_ble__CONN_UPDATE_NEW_LATENCY EQU CYREG_BLE_BLELL_CONN_UPDATE_NEW_LATENCY
CyBle_cy_m0s8_ble__CONN_UPDATE_NEW_SL_INTERVAL EQU CYREG_BLE_BLELL_CONN_UPDATE_NEW_SL_INTERVAL
CyBle_cy_m0s8_ble__CONN_UPDATE_NEW_SUP_TO EQU CYREG_BLE_BLELL_CONN_UPDATE_NEW_SUP_TO
CyBle_cy_m0s8_ble__CTR1 EQU CYREG_BLE_BLERD_CTR1
CyBle_cy_m0s8_ble__DATA_CHANNELS_H0 EQU CYREG_BLE_BLELL_DATA_CHANNELS_H0
CyBle_cy_m0s8_ble__DATA_CHANNELS_H1 EQU CYREG_BLE_BLELL_DATA_CHANNELS_H1
CyBle_cy_m0s8_ble__DATA_CHANNELS_L0 EQU CYREG_BLE_BLELL_DATA_CHANNELS_L0
CyBle_cy_m0s8_ble__DATA_CHANNELS_L1 EQU CYREG_BLE_BLELL_DATA_CHANNELS_L1
CyBle_cy_m0s8_ble__DATA_CHANNELS_M0 EQU CYREG_BLE_BLELL_DATA_CHANNELS_M0
CyBle_cy_m0s8_ble__DATA_CHANNELS_M1 EQU CYREG_BLE_BLELL_DATA_CHANNELS_M1
CyBle_cy_m0s8_ble__DATA_LIST_ACK_UPDATE__STATUS EQU CYREG_BLE_BLELL_DATA_LIST_ACK_UPDATE__STATUS
CyBle_cy_m0s8_ble__DATA_LIST_SENT_UPDATE__STATUS EQU CYREG_BLE_BLELL_DATA_LIST_SENT_UPDATE__STATUS
CyBle_cy_m0s8_ble__DATA_MEM_DESCRIPTOR0 EQU CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR0
CyBle_cy_m0s8_ble__DATA_MEM_DESCRIPTOR1 EQU CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR1
CyBle_cy_m0s8_ble__DATA_MEM_DESCRIPTOR2 EQU CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR2
CyBle_cy_m0s8_ble__DATA_MEM_DESCRIPTOR3 EQU CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR3
CyBle_cy_m0s8_ble__DATA_MEM_DESCRIPTOR4 EQU CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR4
CyBle_cy_m0s8_ble__DATA0 EQU CYREG_BLE_BLELL_DATA0
CyBle_cy_m0s8_ble__DATA1 EQU CYREG_BLE_BLELL_DATA1
CyBle_cy_m0s8_ble__DATA10 EQU CYREG_BLE_BLELL_DATA10
CyBle_cy_m0s8_ble__DATA11 EQU CYREG_BLE_BLELL_DATA11
CyBle_cy_m0s8_ble__DATA12 EQU CYREG_BLE_BLELL_DATA12
CyBle_cy_m0s8_ble__DATA13 EQU CYREG_BLE_BLELL_DATA13
CyBle_cy_m0s8_ble__DATA2 EQU CYREG_BLE_BLELL_DATA2
CyBle_cy_m0s8_ble__DATA3 EQU CYREG_BLE_BLELL_DATA3
CyBle_cy_m0s8_ble__DATA4 EQU CYREG_BLE_BLELL_DATA4
CyBle_cy_m0s8_ble__DATA5 EQU CYREG_BLE_BLELL_DATA5
CyBle_cy_m0s8_ble__DATA6 EQU CYREG_BLE_BLELL_DATA6
CyBle_cy_m0s8_ble__DATA7 EQU CYREG_BLE_BLELL_DATA7
CyBle_cy_m0s8_ble__DATA8 EQU CYREG_BLE_BLELL_DATA8
CyBle_cy_m0s8_ble__DATA9 EQU CYREG_BLE_BLELL_DATA9
CyBle_cy_m0s8_ble__DBG_1 EQU CYREG_BLE_BLERD_DBG_1
CyBle_cy_m0s8_ble__DBG_2 EQU CYREG_BLE_BLERD_DBG_2
CyBle_cy_m0s8_ble__DBG_3 EQU CYREG_BLE_BLERD_DBG_3
CyBle_cy_m0s8_ble__DBG_BB EQU CYREG_BLE_BLERD_DBG_BB
CyBle_cy_m0s8_ble__DBUS EQU CYREG_BLE_BLERD_DBUS
CyBle_cy_m0s8_ble__DC EQU CYREG_BLE_BLERD_DC
CyBle_cy_m0s8_ble__DCCAL EQU CYREG_BLE_BLERD_DCCAL
CyBle_cy_m0s8_ble__DEV_PUB_ADDR_H EQU CYREG_BLE_BLELL_DEV_PUB_ADDR_H
CyBle_cy_m0s8_ble__DEV_PUB_ADDR_L EQU CYREG_BLE_BLELL_DEV_PUB_ADDR_L
CyBle_cy_m0s8_ble__DEV_PUB_ADDR_M EQU CYREG_BLE_BLELL_DEV_PUB_ADDR_M
CyBle_cy_m0s8_ble__DEVICE_RAND_ADDR_H EQU CYREG_BLE_BLELL_DEVICE_RAND_ADDR_H
CyBle_cy_m0s8_ble__DEVICE_RAND_ADDR_L EQU CYREG_BLE_BLELL_DEVICE_RAND_ADDR_L
CyBle_cy_m0s8_ble__DEVICE_RAND_ADDR_M EQU CYREG_BLE_BLELL_DEVICE_RAND_ADDR_M
CyBle_cy_m0s8_ble__DIAG1 EQU CYREG_BLE_BLERD_DIAG1
CyBle_cy_m0s8_ble__DPLL_CONFIG EQU CYREG_BLE_BLELL_DPLL_CONFIG
CyBle_cy_m0s8_ble__DSM1 EQU CYREG_BLE_BLERD_DSM1
CyBle_cy_m0s8_ble__DSM2 EQU CYREG_BLE_BLERD_DSM2
CyBle_cy_m0s8_ble__DSM3 EQU CYREG_BLE_BLERD_DSM3
CyBle_cy_m0s8_ble__DSM4 EQU CYREG_BLE_BLERD_DSM4
CyBle_cy_m0s8_ble__DSM5 EQU CYREG_BLE_BLERD_DSM5
CyBle_cy_m0s8_ble__DSM6 EQU CYREG_BLE_BLERD_DSM6
CyBle_cy_m0s8_ble__DTM_RX_PKT_COUNT EQU CYREG_BLE_BLELL_DTM_RX_PKT_COUNT
CyBle_cy_m0s8_ble__ENC_CONFIG EQU CYREG_BLE_BLELL_ENC_CONFIG
CyBle_cy_m0s8_ble__ENC_INTR EQU CYREG_BLE_BLELL_ENC_INTR
CyBle_cy_m0s8_ble__ENC_INTR_EN EQU CYREG_BLE_BLELL_ENC_INTR_EN
CyBle_cy_m0s8_ble__ENC_KEY0 EQU CYREG_BLE_BLELL_ENC_KEY0
CyBle_cy_m0s8_ble__ENC_KEY1 EQU CYREG_BLE_BLELL_ENC_KEY1
CyBle_cy_m0s8_ble__ENC_KEY2 EQU CYREG_BLE_BLELL_ENC_KEY2
CyBle_cy_m0s8_ble__ENC_KEY3 EQU CYREG_BLE_BLELL_ENC_KEY3
CyBle_cy_m0s8_ble__ENC_KEY4 EQU CYREG_BLE_BLELL_ENC_KEY4
CyBle_cy_m0s8_ble__ENC_KEY5 EQU CYREG_BLE_BLELL_ENC_KEY5
CyBle_cy_m0s8_ble__ENC_KEY6 EQU CYREG_BLE_BLELL_ENC_KEY6
CyBle_cy_m0s8_ble__ENC_KEY7 EQU CYREG_BLE_BLELL_ENC_KEY7
CyBle_cy_m0s8_ble__ENC_PARAMS EQU CYREG_BLE_BLELL_ENC_PARAMS
CyBle_cy_m0s8_ble__EVENT_ENABLE EQU CYREG_BLE_BLELL_EVENT_ENABLE
CyBle_cy_m0s8_ble__EVENT_INTR EQU CYREG_BLE_BLELL_EVENT_INTR
CyBle_cy_m0s8_ble__FCAL_TEST EQU CYREG_BLE_BLERD_FCAL_TEST
CyBle_cy_m0s8_ble__FPD_TEST EQU CYREG_BLE_BLERD_FPD_TEST
CyBle_cy_m0s8_ble__FSM EQU CYREG_BLE_BLERD_FSM
CyBle_cy_m0s8_ble__IM EQU CYREG_BLE_BLERD_IM
CyBle_cy_m0s8_ble__INIT_CONFIG EQU CYREG_BLE_BLELL_INIT_CONFIG
CyBle_cy_m0s8_ble__INIT_INTERVAL EQU CYREG_BLE_BLELL_INIT_INTERVAL
CyBle_cy_m0s8_ble__INIT_INTR EQU CYREG_BLE_BLELL_INIT_INTR
CyBle_cy_m0s8_ble__INIT_NEXT_INSTANT EQU CYREG_BLE_BLELL_INIT_NEXT_INSTANT
CyBle_cy_m0s8_ble__INIT_PARAM EQU CYREG_BLE_BLELL_INIT_PARAM
CyBle_cy_m0s8_ble__INIT_SCN_ADV_RX_FIFO EQU CYREG_BLE_BLELL_INIT_SCN_ADV_RX_FIFO
CyBle_cy_m0s8_ble__INIT_WINDOW EQU CYREG_BLE_BLELL_INIT_WINDOW
CyBle_cy_m0s8_ble__IQMIS EQU CYREG_BLE_BLERD_IQMIS
CyBle_cy_m0s8_ble__IV_MASTER0 EQU CYREG_BLE_BLELL_IV_MASTER0
CyBle_cy_m0s8_ble__IV_MASTER1 EQU CYREG_BLE_BLELL_IV_MASTER1
CyBle_cy_m0s8_ble__IV_SLAVE0 EQU CYREG_BLE_BLELL_IV_SLAVE0
CyBle_cy_m0s8_ble__IV_SLAVE1 EQU CYREG_BLE_BLELL_IV_SLAVE1
CyBle_cy_m0s8_ble__KVCAL EQU CYREG_BLE_BLERD_KVCAL
CyBle_cy_m0s8_ble__LDO EQU CYREG_BLE_BLERD_LDO
CyBle_cy_m0s8_ble__LDO_BYPASS EQU CYREG_BLE_BLERD_LDO_BYPASS
CyBle_cy_m0s8_ble__LE_PING_TIMER_ADDR EQU CYREG_BLE_BLELL_LE_PING_TIMER_ADDR
CyBle_cy_m0s8_ble__LE_PING_TIMER_NEXT_EXP EQU CYREG_BLE_BLELL_LE_PING_TIMER_NEXT_EXP
CyBle_cy_m0s8_ble__LE_PING_TIMER_OFFSET EQU CYREG_BLE_BLELL_LE_PING_TIMER_OFFSET
CyBle_cy_m0s8_ble__LE_PING_TIMER_WRAP_COUNT EQU CYREG_BLE_BLELL_LE_PING_TIMER_WRAP_COUNT
CyBle_cy_m0s8_ble__LE_RF_TEST_MODE EQU CYREG_BLE_BLELL_LE_RF_TEST_MODE
CyBle_cy_m0s8_ble__LF_CLK_CTRL EQU CYREG_BLE_BLESS_LF_CLK_CTRL
CyBle_cy_m0s8_ble__LL_CLK_EN EQU CYREG_BLE_BLESS_LL_CLK_EN
CyBle_cy_m0s8_ble__LL_DSM_CTRL EQU CYREG_BLE_BLESS_LL_DSM_CTRL
CyBle_cy_m0s8_ble__LL_DSM_INTR_STAT EQU CYREG_BLE_BLESS_LL_DSM_INTR_STAT
CyBle_cy_m0s8_ble__LLH_FEATURE_CONFIG EQU CYREG_BLE_BLELL_LLH_FEATURE_CONFIG
CyBle_cy_m0s8_ble__MIC_IN0 EQU CYREG_BLE_BLELL_MIC_IN0
CyBle_cy_m0s8_ble__MIC_IN1 EQU CYREG_BLE_BLELL_MIC_IN1
CyBle_cy_m0s8_ble__MIC_OUT0 EQU CYREG_BLE_BLELL_MIC_OUT0
CyBle_cy_m0s8_ble__MIC_OUT1 EQU CYREG_BLE_BLELL_MIC_OUT1
CyBle_cy_m0s8_ble__MODEM EQU CYREG_BLE_BLERD_MODEM
CyBle_cy_m0s8_ble__MONI EQU CYREG_BLE_BLERD_MONI
CyBle_cy_m0s8_ble__NEXT_CE_INSTANT EQU CYREG_BLE_BLELL_NEXT_CE_INSTANT
CyBle_cy_m0s8_ble__NEXT_RESP_TIMER_EXP EQU CYREG_BLE_BLELL_NEXT_RESP_TIMER_EXP
CyBle_cy_m0s8_ble__NEXT_SUP_TO EQU CYREG_BLE_BLELL_NEXT_SUP_TO
CyBle_cy_m0s8_ble__OFFSET_TO_FIRST_INSTANT EQU CYREG_BLE_BLELL_OFFSET_TO_FIRST_INSTANT
CyBle_cy_m0s8_ble__PACKET_COUNTER0 EQU CYREG_BLE_BLELL_PACKET_COUNTER0
CyBle_cy_m0s8_ble__PACKET_COUNTER1 EQU CYREG_BLE_BLELL_PACKET_COUNTER1
CyBle_cy_m0s8_ble__PACKET_COUNTER2 EQU CYREG_BLE_BLELL_PACKET_COUNTER2
CyBle_cy_m0s8_ble__PDU_ACCESS_ADDR_H_REGISTER EQU CYREG_BLE_BLELL_PDU_ACCESS_ADDR_H_REGISTER
CyBle_cy_m0s8_ble__PDU_ACCESS_ADDR_L_REGISTER EQU CYREG_BLE_BLELL_PDU_ACCESS_ADDR_L_REGISTER
CyBle_cy_m0s8_ble__PDU_RESP_TIMER EQU CYREG_BLE_BLELL_PDU_RESP_TIMER
CyBle_cy_m0s8_ble__PEER_ADDR_H EQU CYREG_BLE_BLELL_PEER_ADDR_H
CyBle_cy_m0s8_ble__PEER_ADDR_L EQU CYREG_BLE_BLELL_PEER_ADDR_L
CyBle_cy_m0s8_ble__PEER_ADDR_M EQU CYREG_BLE_BLELL_PEER_ADDR_M
CyBle_cy_m0s8_ble__POC_REG__TIM_CONTROL EQU CYREG_BLE_BLELL_POC_REG__TIM_CONTROL
CyBle_cy_m0s8_ble__RCCAL EQU CYREG_BLE_BLERD_RCCAL
CyBle_cy_m0s8_ble__READ_IQ_1 EQU CYREG_BLE_BLERD_READ_IQ_1
CyBle_cy_m0s8_ble__READ_IQ_2 EQU CYREG_BLE_BLERD_READ_IQ_2
CyBle_cy_m0s8_ble__READ_IQ_3 EQU CYREG_BLE_BLERD_READ_IQ_3
CyBle_cy_m0s8_ble__READ_IQ_4 EQU CYREG_BLE_BLERD_READ_IQ_4
CyBle_cy_m0s8_ble__RECEIVE_TRIG_CTRL EQU CYREG_BLE_BLELL_RECEIVE_TRIG_CTRL
CyBle_cy_m0s8_ble__RF_CONFIG EQU CYREG_BLE_BLESS_RF_CONFIG
CyBle_cy_m0s8_ble__RMAP EQU CYREG_BLE_BLERD_RMAP
CyBle_cy_m0s8_ble__RSSI EQU CYREG_BLE_BLERD_RSSI
CyBle_cy_m0s8_ble__RX EQU CYREG_BLE_BLERD_RX
CyBle_cy_m0s8_ble__RX_BUMP1 EQU CYREG_BLE_BLERD_RX_BUMP1
CyBle_cy_m0s8_ble__RX_BUMP2 EQU CYREG_BLE_BLERD_RX_BUMP2
CyBle_cy_m0s8_ble__SCAN_CONFIG EQU CYREG_BLE_BLELL_SCAN_CONFIG
CyBle_cy_m0s8_ble__SCAN_INTERVAL EQU CYREG_BLE_BLELL_SCAN_INTERVAL
CyBle_cy_m0s8_ble__SCAN_INTR EQU CYREG_BLE_BLELL_SCAN_INTR
CyBle_cy_m0s8_ble__SCAN_NEXT_INSTANT EQU CYREG_BLE_BLELL_SCAN_NEXT_INSTANT
CyBle_cy_m0s8_ble__SCAN_PARAM EQU CYREG_BLE_BLELL_SCAN_PARAM
CyBle_cy_m0s8_ble__SCAN_WINDOW EQU CYREG_BLE_BLELL_SCAN_WINDOW
CyBle_cy_m0s8_ble__SL_CONN_INTERVAL EQU CYREG_BLE_BLELL_SL_CONN_INTERVAL
CyBle_cy_m0s8_ble__SLAVE_LATENCY EQU CYREG_BLE_BLELL_SLAVE_LATENCY
CyBle_cy_m0s8_ble__SLAVE_TIMING_CONTROL EQU CYREG_BLE_BLELL_SLAVE_TIMING_CONTROL
CyBle_cy_m0s8_ble__SLV_WIN_ADJ EQU CYREG_BLE_BLELL_SLV_WIN_ADJ
CyBle_cy_m0s8_ble__SUP_TIMEOUT EQU CYREG_BLE_BLELL_SUP_TIMEOUT
CyBle_cy_m0s8_ble__SY EQU CYREG_BLE_BLERD_SY
CyBle_cy_m0s8_ble__SY_BUMP1 EQU CYREG_BLE_BLERD_SY_BUMP1
CyBle_cy_m0s8_ble__SY_BUMP2 EQU CYREG_BLE_BLERD_SY_BUMP2
CyBle_cy_m0s8_ble__TEST EQU CYREG_BLE_BLERD_TEST
CyBle_cy_m0s8_ble__TEST2_SY EQU CYREG_BLE_BLERD_TEST2_SY
CyBle_cy_m0s8_ble__THRSHD1 EQU CYREG_BLE_BLERD_THRSHD1
CyBle_cy_m0s8_ble__THRSHD2 EQU CYREG_BLE_BLERD_THRSHD2
CyBle_cy_m0s8_ble__THRSHD3 EQU CYREG_BLE_BLERD_THRSHD3
CyBle_cy_m0s8_ble__THRSHD4 EQU CYREG_BLE_BLERD_THRSHD4
CyBle_cy_m0s8_ble__THRSHD5 EQU CYREG_BLE_BLERD_THRSHD5
CyBle_cy_m0s8_ble__TIM_COUNTER_L EQU CYREG_BLE_BLELL_TIM_COUNTER_L
CyBle_cy_m0s8_ble__TRANSMIT_WINDOW_OFFSET EQU CYREG_BLE_BLELL_TRANSMIT_WINDOW_OFFSET
CyBle_cy_m0s8_ble__TRANSMIT_WINDOW_SIZE EQU CYREG_BLE_BLELL_TRANSMIT_WINDOW_SIZE
CyBle_cy_m0s8_ble__TX EQU CYREG_BLE_BLERD_TX
CyBle_cy_m0s8_ble__TX_BUMP1 EQU CYREG_BLE_BLERD_TX_BUMP1
CyBle_cy_m0s8_ble__TX_BUMP2 EQU CYREG_BLE_BLERD_TX_BUMP2
CyBle_cy_m0s8_ble__TX_EN_EXT_DELAY EQU CYREG_BLE_BLELL_TX_EN_EXT_DELAY
CyBle_cy_m0s8_ble__TX_RX_ON_DELAY EQU CYREG_BLE_BLELL_TX_RX_ON_DELAY
CyBle_cy_m0s8_ble__TX_RX_SYNTH_DELAY EQU CYREG_BLE_BLELL_TX_RX_SYNTH_DELAY
CyBle_cy_m0s8_ble__TXRX_HOP EQU CYREG_BLE_BLELL_TXRX_HOP
CyBle_cy_m0s8_ble__WAKEUP_CONFIG EQU CYREG_BLE_BLELL_WAKEUP_CONFIG
CyBle_cy_m0s8_ble__WAKEUP_CONTROL EQU CYREG_BLE_BLELL_WAKEUP_CONTROL
CyBle_cy_m0s8_ble__WCO_CONFIG EQU CYREG_BLE_BLESS_WCO_CONFIG
CyBle_cy_m0s8_ble__WCO_STATUS EQU CYREG_BLE_BLESS_WCO_STATUS
CyBle_cy_m0s8_ble__WCO_TRIM EQU CYREG_BLE_BLESS_WCO_TRIM
CyBle_cy_m0s8_ble__WHITELIST_BASE_ADDR EQU CYREG_BLE_BLELL_WHITELIST_BASE_ADDR
CyBle_cy_m0s8_ble__WIN_MIN_STEP_SIZE EQU CYREG_BLE_BLELL_WIN_MIN_STEP_SIZE
CyBle_cy_m0s8_ble__WINDOW_WIDEN_INTVL EQU CYREG_BLE_BLELL_WINDOW_WIDEN_INTVL
CyBle_cy_m0s8_ble__WINDOW_WIDEN_WINOFF EQU CYREG_BLE_BLELL_WINDOW_WIDEN_WINOFF
CyBle_cy_m0s8_ble__WL_ADDR_TYPE EQU CYREG_BLE_BLELL_WL_ADDR_TYPE
CyBle_cy_m0s8_ble__WL_ENABLE EQU CYREG_BLE_BLELL_WL_ENABLE
CyBle_cy_m0s8_ble__XTAL_CLK_DIV_CONFIG EQU CYREG_BLE_BLESS_XTAL_CLK_DIV_CONFIG

/* MIC_IN */
MIC_IN__0__DR EQU CYREG_GPIO_PRT2_DR
MIC_IN__0__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
MIC_IN__0__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
MIC_IN__0__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
MIC_IN__0__HSIOM EQU CYREG_HSIOM_PORT_SEL2
MIC_IN__0__HSIOM_MASK EQU 0x0000000F
MIC_IN__0__HSIOM_SHIFT EQU 0
MIC_IN__0__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
MIC_IN__0__INTR EQU CYREG_GPIO_PRT2_INTR
MIC_IN__0__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
MIC_IN__0__INTSTAT EQU CYREG_GPIO_PRT2_INTR
MIC_IN__0__MASK EQU 0x01
MIC_IN__0__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
MIC_IN__0__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
MIC_IN__0__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
MIC_IN__0__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
MIC_IN__0__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
MIC_IN__0__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
MIC_IN__0__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
MIC_IN__0__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
MIC_IN__0__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
MIC_IN__0__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
MIC_IN__0__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
MIC_IN__0__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
MIC_IN__0__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
MIC_IN__0__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
MIC_IN__0__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
MIC_IN__0__PC EQU CYREG_GPIO_PRT2_PC
MIC_IN__0__PC2 EQU CYREG_GPIO_PRT2_PC2
MIC_IN__0__PORT EQU 2
MIC_IN__0__PS EQU CYREG_GPIO_PRT2_PS
MIC_IN__0__SHIFT EQU 0
MIC_IN__DR EQU CYREG_GPIO_PRT2_DR
MIC_IN__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
MIC_IN__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
MIC_IN__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
MIC_IN__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
MIC_IN__INTR EQU CYREG_GPIO_PRT2_INTR
MIC_IN__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
MIC_IN__INTSTAT EQU CYREG_GPIO_PRT2_INTR
MIC_IN__MASK EQU 0x01
MIC_IN__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
MIC_IN__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
MIC_IN__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
MIC_IN__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
MIC_IN__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
MIC_IN__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
MIC_IN__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
MIC_IN__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
MIC_IN__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
MIC_IN__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
MIC_IN__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
MIC_IN__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
MIC_IN__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
MIC_IN__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
MIC_IN__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
MIC_IN__PC EQU CYREG_GPIO_PRT2_PC
MIC_IN__PC2 EQU CYREG_GPIO_PRT2_PC2
MIC_IN__PORT EQU 2
MIC_IN__PS EQU CYREG_GPIO_PRT2_PS
MIC_IN__SHIFT EQU 0

/* ADC_Pin */
ADC_Pin__0__DR EQU CYREG_GPIO_PRT2_DR
ADC_Pin__0__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
ADC_Pin__0__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
ADC_Pin__0__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
ADC_Pin__0__HSIOM EQU CYREG_HSIOM_PORT_SEL2
ADC_Pin__0__HSIOM_MASK EQU 0x000000F0
ADC_Pin__0__HSIOM_SHIFT EQU 4
ADC_Pin__0__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
ADC_Pin__0__INTR EQU CYREG_GPIO_PRT2_INTR
ADC_Pin__0__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
ADC_Pin__0__INTSTAT EQU CYREG_GPIO_PRT2_INTR
ADC_Pin__0__MASK EQU 0x02
ADC_Pin__0__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
ADC_Pin__0__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
ADC_Pin__0__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
ADC_Pin__0__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
ADC_Pin__0__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
ADC_Pin__0__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
ADC_Pin__0__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
ADC_Pin__0__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
ADC_Pin__0__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
ADC_Pin__0__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
ADC_Pin__0__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
ADC_Pin__0__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
ADC_Pin__0__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
ADC_Pin__0__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
ADC_Pin__0__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
ADC_Pin__0__PC EQU CYREG_GPIO_PRT2_PC
ADC_Pin__0__PC2 EQU CYREG_GPIO_PRT2_PC2
ADC_Pin__0__PORT EQU 2
ADC_Pin__0__PS EQU CYREG_GPIO_PRT2_PS
ADC_Pin__0__SHIFT EQU 1
ADC_Pin__DR EQU CYREG_GPIO_PRT2_DR
ADC_Pin__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
ADC_Pin__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
ADC_Pin__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
ADC_Pin__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
ADC_Pin__INTR EQU CYREG_GPIO_PRT2_INTR
ADC_Pin__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
ADC_Pin__INTSTAT EQU CYREG_GPIO_PRT2_INTR
ADC_Pin__MASK EQU 0x02
ADC_Pin__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
ADC_Pin__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
ADC_Pin__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
ADC_Pin__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
ADC_Pin__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
ADC_Pin__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
ADC_Pin__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
ADC_Pin__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
ADC_Pin__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
ADC_Pin__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
ADC_Pin__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
ADC_Pin__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
ADC_Pin__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
ADC_Pin__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
ADC_Pin__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
ADC_Pin__PC EQU CYREG_GPIO_PRT2_PC
ADC_Pin__PC2 EQU CYREG_GPIO_PRT2_PC2
ADC_Pin__PORT EQU 2
ADC_Pin__PS EQU CYREG_GPIO_PRT2_PS
ADC_Pin__SHIFT EQU 1

/* Led_Pin */
Led_Pin__0__DR EQU CYREG_GPIO_PRT5_DR
Led_Pin__0__DR_CLR EQU CYREG_GPIO_PRT5_DR_CLR
Led_Pin__0__DR_INV EQU CYREG_GPIO_PRT5_DR_INV
Led_Pin__0__DR_SET EQU CYREG_GPIO_PRT5_DR_SET
Led_Pin__0__HSIOM EQU CYREG_HSIOM_PORT_SEL5
Led_Pin__0__HSIOM_MASK EQU 0x0000000F
Led_Pin__0__HSIOM_SHIFT EQU 0
Led_Pin__0__INTCFG EQU CYREG_GPIO_PRT5_INTR_CFG
Led_Pin__0__INTR EQU CYREG_GPIO_PRT5_INTR
Led_Pin__0__INTR_CFG EQU CYREG_GPIO_PRT5_INTR_CFG
Led_Pin__0__INTSTAT EQU CYREG_GPIO_PRT5_INTR
Led_Pin__0__MASK EQU 0x01
Led_Pin__0__PC EQU CYREG_GPIO_PRT5_PC
Led_Pin__0__PC2 EQU CYREG_GPIO_PRT5_PC2
Led_Pin__0__PORT EQU 5
Led_Pin__0__PS EQU CYREG_GPIO_PRT5_PS
Led_Pin__0__SHIFT EQU 0
Led_Pin__DR EQU CYREG_GPIO_PRT5_DR
Led_Pin__DR_CLR EQU CYREG_GPIO_PRT5_DR_CLR
Led_Pin__DR_INV EQU CYREG_GPIO_PRT5_DR_INV
Led_Pin__DR_SET EQU CYREG_GPIO_PRT5_DR_SET
Led_Pin__INTCFG EQU CYREG_GPIO_PRT5_INTR_CFG
Led_Pin__INTR EQU CYREG_GPIO_PRT5_INTR
Led_Pin__INTR_CFG EQU CYREG_GPIO_PRT5_INTR_CFG
Led_Pin__INTSTAT EQU CYREG_GPIO_PRT5_INTR
Led_Pin__MASK EQU 0x01
Led_Pin__PC EQU CYREG_GPIO_PRT5_PC
Led_Pin__PC2 EQU CYREG_GPIO_PRT5_PC2
Led_Pin__PORT EQU 5
Led_Pin__PS EQU CYREG_GPIO_PRT5_PS
Led_Pin__SHIFT EQU 0

/* Opamp_1_cy_psoc4_abuf */
Opamp_1_cy_psoc4_abuf__COMP_STAT EQU CYREG_CTBM0_COMP_STAT
Opamp_1_cy_psoc4_abuf__COMP_STAT_SHIFT EQU 16
Opamp_1_cy_psoc4_abuf__CTBM_CTB_CTRL EQU CYREG_CTBM0_CTB_CTRL
Opamp_1_cy_psoc4_abuf__INTR EQU CYREG_CTBM0_INTR
Opamp_1_cy_psoc4_abuf__INTR_MASK EQU CYREG_CTBM0_INTR_MASK
Opamp_1_cy_psoc4_abuf__INTR_MASK_SHIFT EQU 1
Opamp_1_cy_psoc4_abuf__INTR_MASKED EQU CYREG_CTBM0_INTR_MASKED
Opamp_1_cy_psoc4_abuf__INTR_MASKED_SHIFT EQU 1
Opamp_1_cy_psoc4_abuf__INTR_SET EQU CYREG_CTBM0_INTR_SET
Opamp_1_cy_psoc4_abuf__INTR_SET_SHIFT EQU 1
Opamp_1_cy_psoc4_abuf__INTR_SHIFT EQU 1
Opamp_1_cy_psoc4_abuf__OA_COMP_TRIM EQU CYREG_CTBM0_OA1_COMP_TRIM
Opamp_1_cy_psoc4_abuf__OA_NUMBER EQU 1
Opamp_1_cy_psoc4_abuf__OA_OFFSET_TRIM EQU CYREG_CTBM0_OA1_OFFSET_TRIM
Opamp_1_cy_psoc4_abuf__OA_RES_CTRL EQU CYREG_CTBM0_OA_RES1_CTRL
Opamp_1_cy_psoc4_abuf__OA_SLOPE_OFFSET_TRIM EQU CYREG_CTBM0_OA1_SLOPE_OFFSET_TRIM

/* Opamp_2_cy_psoc4_abuf */
Opamp_2_cy_psoc4_abuf__COMP_STAT EQU CYREG_CTBM0_COMP_STAT
Opamp_2_cy_psoc4_abuf__COMP_STAT_SHIFT EQU 0
Opamp_2_cy_psoc4_abuf__CTBM_CTB_CTRL EQU CYREG_CTBM0_CTB_CTRL
Opamp_2_cy_psoc4_abuf__INTR EQU CYREG_CTBM0_INTR
Opamp_2_cy_psoc4_abuf__INTR_MASK EQU CYREG_CTBM0_INTR_MASK
Opamp_2_cy_psoc4_abuf__INTR_MASK_SHIFT EQU 0
Opamp_2_cy_psoc4_abuf__INTR_MASKED EQU CYREG_CTBM0_INTR_MASKED
Opamp_2_cy_psoc4_abuf__INTR_MASKED_SHIFT EQU 0
Opamp_2_cy_psoc4_abuf__INTR_SET EQU CYREG_CTBM0_INTR_SET
Opamp_2_cy_psoc4_abuf__INTR_SET_SHIFT EQU 0
Opamp_2_cy_psoc4_abuf__INTR_SHIFT EQU 0
Opamp_2_cy_psoc4_abuf__OA_COMP_TRIM EQU CYREG_CTBM0_OA0_COMP_TRIM
Opamp_2_cy_psoc4_abuf__OA_NUMBER EQU 0
Opamp_2_cy_psoc4_abuf__OA_OFFSET_TRIM EQU CYREG_CTBM0_OA0_OFFSET_TRIM
Opamp_2_cy_psoc4_abuf__OA_RES_CTRL EQU CYREG_CTBM0_OA_RES0_CTRL
Opamp_2_cy_psoc4_abuf__OA_SLOPE_OFFSET_TRIM EQU CYREG_CTBM0_OA0_SLOPE_OFFSET_TRIM

/* Timer_1_cy_m0s8_tcpwm_1 */
Timer_1_cy_m0s8_tcpwm_1__CC EQU CYREG_TCPWM_CNT0_CC
Timer_1_cy_m0s8_tcpwm_1__CC_BUFF EQU CYREG_TCPWM_CNT0_CC_BUFF
Timer_1_cy_m0s8_tcpwm_1__COUNTER EQU CYREG_TCPWM_CNT0_COUNTER
Timer_1_cy_m0s8_tcpwm_1__CTRL EQU CYREG_TCPWM_CNT0_CTRL
Timer_1_cy_m0s8_tcpwm_1__INTR EQU CYREG_TCPWM_CNT0_INTR
Timer_1_cy_m0s8_tcpwm_1__INTR_MASK EQU CYREG_TCPWM_CNT0_INTR_MASK
Timer_1_cy_m0s8_tcpwm_1__INTR_MASKED EQU CYREG_TCPWM_CNT0_INTR_MASKED
Timer_1_cy_m0s8_tcpwm_1__INTR_SET EQU CYREG_TCPWM_CNT0_INTR_SET
Timer_1_cy_m0s8_tcpwm_1__PERIOD EQU CYREG_TCPWM_CNT0_PERIOD
Timer_1_cy_m0s8_tcpwm_1__PERIOD_BUFF EQU CYREG_TCPWM_CNT0_PERIOD_BUFF
Timer_1_cy_m0s8_tcpwm_1__STATUS EQU CYREG_TCPWM_CNT0_STATUS
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMD EQU CYREG_TCPWM_CMD
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMDCAPTURE_MASK EQU 0x01
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMDCAPTURE_SHIFT EQU 0
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMDRELOAD_MASK EQU 0x100
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMDRELOAD_SHIFT EQU 8
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMDSTART_MASK EQU 0x1000000
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMDSTART_SHIFT EQU 24
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMDSTOP_MASK EQU 0x10000
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CMDSTOP_SHIFT EQU 16
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CTRL EQU CYREG_TCPWM_CTRL
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CTRL_MASK EQU 0x01
Timer_1_cy_m0s8_tcpwm_1__TCPWM_CTRL_SHIFT EQU 0
Timer_1_cy_m0s8_tcpwm_1__TCPWM_INTR_CAUSE EQU CYREG_TCPWM_INTR_CAUSE
Timer_1_cy_m0s8_tcpwm_1__TCPWM_INTR_CAUSE_MASK EQU 0x01
Timer_1_cy_m0s8_tcpwm_1__TCPWM_INTR_CAUSE_SHIFT EQU 0
Timer_1_cy_m0s8_tcpwm_1__TCPWM_NUMBER EQU 0
Timer_1_cy_m0s8_tcpwm_1__TR_CTRL0 EQU CYREG_TCPWM_CNT0_TR_CTRL0
Timer_1_cy_m0s8_tcpwm_1__TR_CTRL1 EQU CYREG_TCPWM_CNT0_TR_CTRL1
Timer_1_cy_m0s8_tcpwm_1__TR_CTRL2 EQU CYREG_TCPWM_CNT0_TR_CTRL2

/* Audio_EN */
Audio_EN__0__DR EQU CYREG_GPIO_PRT4_DR
Audio_EN__0__DR_CLR EQU CYREG_GPIO_PRT4_DR_CLR
Audio_EN__0__DR_INV EQU CYREG_GPIO_PRT4_DR_INV
Audio_EN__0__DR_SET EQU CYREG_GPIO_PRT4_DR_SET
Audio_EN__0__HSIOM EQU CYREG_HSIOM_PORT_SEL4
Audio_EN__0__HSIOM_MASK EQU 0x000000F0
Audio_EN__0__HSIOM_SHIFT EQU 4
Audio_EN__0__INTCFG EQU CYREG_GPIO_PRT4_INTR_CFG
Audio_EN__0__INTR EQU CYREG_GPIO_PRT4_INTR
Audio_EN__0__INTR_CFG EQU CYREG_GPIO_PRT4_INTR_CFG
Audio_EN__0__INTSTAT EQU CYREG_GPIO_PRT4_INTR
Audio_EN__0__MASK EQU 0x02
Audio_EN__0__PC EQU CYREG_GPIO_PRT4_PC
Audio_EN__0__PC2 EQU CYREG_GPIO_PRT4_PC2
Audio_EN__0__PORT EQU 4
Audio_EN__0__PS EQU CYREG_GPIO_PRT4_PS
Audio_EN__0__SHIFT EQU 1
Audio_EN__DR EQU CYREG_GPIO_PRT4_DR
Audio_EN__DR_CLR EQU CYREG_GPIO_PRT4_DR_CLR
Audio_EN__DR_INV EQU CYREG_GPIO_PRT4_DR_INV
Audio_EN__DR_SET EQU CYREG_GPIO_PRT4_DR_SET
Audio_EN__INTCFG EQU CYREG_GPIO_PRT4_INTR_CFG
Audio_EN__INTR EQU CYREG_GPIO_PRT4_INTR
Audio_EN__INTR_CFG EQU CYREG_GPIO_PRT4_INTR_CFG
Audio_EN__INTSTAT EQU CYREG_GPIO_PRT4_INTR
Audio_EN__MASK EQU 0x02
Audio_EN__PC EQU CYREG_GPIO_PRT4_PC
Audio_EN__PC2 EQU CYREG_GPIO_PRT4_PC2
Audio_EN__PORT EQU 4
Audio_EN__PS EQU CYREG_GPIO_PRT4_PS
Audio_EN__SHIFT EQU 1

/* Audio_Pin */
Audio_Pin__0__DR EQU CYREG_GPIO_PRT2_DR
Audio_Pin__0__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
Audio_Pin__0__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
Audio_Pin__0__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
Audio_Pin__0__HSIOM EQU CYREG_HSIOM_PORT_SEL2
Audio_Pin__0__HSIOM_MASK EQU 0x00F00000
Audio_Pin__0__HSIOM_SHIFT EQU 20
Audio_Pin__0__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
Audio_Pin__0__INTR EQU CYREG_GPIO_PRT2_INTR
Audio_Pin__0__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
Audio_Pin__0__INTSTAT EQU CYREG_GPIO_PRT2_INTR
Audio_Pin__0__MASK EQU 0x20
Audio_Pin__0__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
Audio_Pin__0__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
Audio_Pin__0__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
Audio_Pin__0__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
Audio_Pin__0__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
Audio_Pin__0__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
Audio_Pin__0__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
Audio_Pin__0__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
Audio_Pin__0__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
Audio_Pin__0__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
Audio_Pin__0__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
Audio_Pin__0__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
Audio_Pin__0__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
Audio_Pin__0__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
Audio_Pin__0__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
Audio_Pin__0__PC EQU CYREG_GPIO_PRT2_PC
Audio_Pin__0__PC2 EQU CYREG_GPIO_PRT2_PC2
Audio_Pin__0__PORT EQU 2
Audio_Pin__0__PS EQU CYREG_GPIO_PRT2_PS
Audio_Pin__0__SHIFT EQU 5
Audio_Pin__DR EQU CYREG_GPIO_PRT2_DR
Audio_Pin__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
Audio_Pin__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
Audio_Pin__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
Audio_Pin__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
Audio_Pin__INTR EQU CYREG_GPIO_PRT2_INTR
Audio_Pin__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
Audio_Pin__INTSTAT EQU CYREG_GPIO_PRT2_INTR
Audio_Pin__MASK EQU 0x20
Audio_Pin__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
Audio_Pin__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
Audio_Pin__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
Audio_Pin__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
Audio_Pin__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
Audio_Pin__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
Audio_Pin__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
Audio_Pin__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
Audio_Pin__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
Audio_Pin__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
Audio_Pin__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
Audio_Pin__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
Audio_Pin__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
Audio_Pin__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
Audio_Pin__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
Audio_Pin__PC EQU CYREG_GPIO_PRT2_PC
Audio_Pin__PC2 EQU CYREG_GPIO_PRT2_PC2
Audio_Pin__PORT EQU 2
Audio_Pin__PS EQU CYREG_GPIO_PRT2_PS
Audio_Pin__SHIFT EQU 5

/* Prism_Led_Clock */
Prism_Led_Clock__CTRL_REGISTER EQU CYREG_PERI_PCLK_CTL10
Prism_Led_Clock__DIV_ID EQU 0x00000043
Prism_Led_Clock__DIV_REGISTER EQU CYREG_PERI_DIV_16_CTL3
Prism_Led_Clock__PA_DIV_ID EQU 0x000000FF

/* Prism_Led_cy_m0s8_tcpwm_1 */
Prism_Led_cy_m0s8_tcpwm_1__CC EQU CYREG_TCPWM_CNT3_CC
Prism_Led_cy_m0s8_tcpwm_1__CC_BUFF EQU CYREG_TCPWM_CNT3_CC_BUFF
Prism_Led_cy_m0s8_tcpwm_1__COUNTER EQU CYREG_TCPWM_CNT3_COUNTER
Prism_Led_cy_m0s8_tcpwm_1__CTRL EQU CYREG_TCPWM_CNT3_CTRL
Prism_Led_cy_m0s8_tcpwm_1__INTR EQU CYREG_TCPWM_CNT3_INTR
Prism_Led_cy_m0s8_tcpwm_1__INTR_MASK EQU CYREG_TCPWM_CNT3_INTR_MASK
Prism_Led_cy_m0s8_tcpwm_1__INTR_MASKED EQU CYREG_TCPWM_CNT3_INTR_MASKED
Prism_Led_cy_m0s8_tcpwm_1__INTR_SET EQU CYREG_TCPWM_CNT3_INTR_SET
Prism_Led_cy_m0s8_tcpwm_1__PERIOD EQU CYREG_TCPWM_CNT3_PERIOD
Prism_Led_cy_m0s8_tcpwm_1__PERIOD_BUFF EQU CYREG_TCPWM_CNT3_PERIOD_BUFF
Prism_Led_cy_m0s8_tcpwm_1__STATUS EQU CYREG_TCPWM_CNT3_STATUS
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMD EQU CYREG_TCPWM_CMD
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMDCAPTURE_MASK EQU 0x08
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMDCAPTURE_SHIFT EQU 3
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMDRELOAD_MASK EQU 0x800
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMDRELOAD_SHIFT EQU 11
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMDSTART_MASK EQU 0x8000000
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMDSTART_SHIFT EQU 27
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMDSTOP_MASK EQU 0x80000
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CMDSTOP_SHIFT EQU 19
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CTRL EQU CYREG_TCPWM_CTRL
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CTRL_MASK EQU 0x08
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_CTRL_SHIFT EQU 3
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_INTR_CAUSE EQU CYREG_TCPWM_INTR_CAUSE
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_INTR_CAUSE_MASK EQU 0x08
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_INTR_CAUSE_SHIFT EQU 3
Prism_Led_cy_m0s8_tcpwm_1__TCPWM_NUMBER EQU 3
Prism_Led_cy_m0s8_tcpwm_1__TR_CTRL0 EQU CYREG_TCPWM_CNT3_TR_CTRL0
Prism_Led_cy_m0s8_tcpwm_1__TR_CTRL1 EQU CYREG_TCPWM_CNT3_TR_CTRL1
Prism_Led_cy_m0s8_tcpwm_1__TR_CTRL2 EQU CYREG_TCPWM_CNT3_TR_CTRL2

/* FILTER_OUT */
FILTER_OUT__0__DR EQU CYREG_GPIO_PRT2_DR
FILTER_OUT__0__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
FILTER_OUT__0__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
FILTER_OUT__0__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
FILTER_OUT__0__HSIOM EQU CYREG_HSIOM_PORT_SEL2
FILTER_OUT__0__HSIOM_MASK EQU 0x00000F00
FILTER_OUT__0__HSIOM_SHIFT EQU 8
FILTER_OUT__0__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
FILTER_OUT__0__INTR EQU CYREG_GPIO_PRT2_INTR
FILTER_OUT__0__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
FILTER_OUT__0__INTSTAT EQU CYREG_GPIO_PRT2_INTR
FILTER_OUT__0__MASK EQU 0x04
FILTER_OUT__0__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
FILTER_OUT__0__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
FILTER_OUT__0__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
FILTER_OUT__0__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
FILTER_OUT__0__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
FILTER_OUT__0__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
FILTER_OUT__0__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
FILTER_OUT__0__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
FILTER_OUT__0__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
FILTER_OUT__0__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
FILTER_OUT__0__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
FILTER_OUT__0__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
FILTER_OUT__0__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
FILTER_OUT__0__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
FILTER_OUT__0__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
FILTER_OUT__0__PC EQU CYREG_GPIO_PRT2_PC
FILTER_OUT__0__PC2 EQU CYREG_GPIO_PRT2_PC2
FILTER_OUT__0__PORT EQU 2
FILTER_OUT__0__PS EQU CYREG_GPIO_PRT2_PS
FILTER_OUT__0__SHIFT EQU 2
FILTER_OUT__DR EQU CYREG_GPIO_PRT2_DR
FILTER_OUT__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
FILTER_OUT__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
FILTER_OUT__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
FILTER_OUT__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
FILTER_OUT__INTR EQU CYREG_GPIO_PRT2_INTR
FILTER_OUT__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
FILTER_OUT__INTSTAT EQU CYREG_GPIO_PRT2_INTR
FILTER_OUT__MASK EQU 0x04
FILTER_OUT__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
FILTER_OUT__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
FILTER_OUT__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
FILTER_OUT__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
FILTER_OUT__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
FILTER_OUT__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
FILTER_OUT__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
FILTER_OUT__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
FILTER_OUT__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
FILTER_OUT__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
FILTER_OUT__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
FILTER_OUT__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
FILTER_OUT__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
FILTER_OUT__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
FILTER_OUT__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
FILTER_OUT__PC EQU CYREG_GPIO_PRT2_PC
FILTER_OUT__PC2 EQU CYREG_GPIO_PRT2_PC2
FILTER_OUT__PORT EQU 2
FILTER_OUT__PS EQU CYREG_GPIO_PRT2_PS
FILTER_OUT__SHIFT EQU 2

/* SW_Tx_UART_tx */
SW_Tx_UART_tx__0__DR EQU CYREG_GPIO_PRT0_DR
SW_Tx_UART_tx__0__DR_CLR EQU CYREG_GPIO_PRT0_DR_CLR
SW_Tx_UART_tx__0__DR_INV EQU CYREG_GPIO_PRT0_DR_INV
SW_Tx_UART_tx__0__DR_SET EQU CYREG_GPIO_PRT0_DR_SET
SW_Tx_UART_tx__0__HSIOM EQU CYREG_HSIOM_PORT_SEL0
SW_Tx_UART_tx__0__HSIOM_MASK EQU 0x00F00000
SW_Tx_UART_tx__0__HSIOM_SHIFT EQU 20
SW_Tx_UART_tx__0__INTCFG EQU CYREG_GPIO_PRT0_INTR_CFG
SW_Tx_UART_tx__0__INTR EQU CYREG_GPIO_PRT0_INTR
SW_Tx_UART_tx__0__INTR_CFG EQU CYREG_GPIO_PRT0_INTR_CFG
SW_Tx_UART_tx__0__INTSTAT EQU CYREG_GPIO_PRT0_INTR
SW_Tx_UART_tx__0__MASK EQU 0x20
SW_Tx_UART_tx__0__PA__CFG0 EQU CYREG_UDB_PA0_CFG0
SW_Tx_UART_tx__0__PA__CFG1 EQU CYREG_UDB_PA0_CFG1
SW_Tx_UART_tx__0__PA__CFG10 EQU CYREG_UDB_PA0_CFG10
SW_Tx_UART_tx__0__PA__CFG11 EQU CYREG_UDB_PA0_CFG11
SW_Tx_UART_tx__0__PA__CFG12 EQU CYREG_UDB_PA0_CFG12
SW_Tx_UART_tx__0__PA__CFG13 EQU CYREG_UDB_PA0_CFG13
SW_Tx_UART_tx__0__PA__CFG14 EQU CYREG_UDB_PA0_CFG14
SW_Tx_UART_tx__0__PA__CFG2 EQU CYREG_UDB_PA0_CFG2
SW_Tx_UART_tx__0__PA__CFG3 EQU CYREG_UDB_PA0_CFG3
SW_Tx_UART_tx__0__PA__CFG4 EQU CYREG_UDB_PA0_CFG4
SW_Tx_UART_tx__0__PA__CFG5 EQU CYREG_UDB_PA0_CFG5
SW_Tx_UART_tx__0__PA__CFG6 EQU CYREG_UDB_PA0_CFG6
SW_Tx_UART_tx__0__PA__CFG7 EQU CYREG_UDB_PA0_CFG7
SW_Tx_UART_tx__0__PA__CFG8 EQU CYREG_UDB_PA0_CFG8
SW_Tx_UART_tx__0__PA__CFG9 EQU CYREG_UDB_PA0_CFG9
SW_Tx_UART_tx__0__PC EQU CYREG_GPIO_PRT0_PC
SW_Tx_UART_tx__0__PC2 EQU CYREG_GPIO_PRT0_PC2
SW_Tx_UART_tx__0__PORT EQU 0
SW_Tx_UART_tx__0__PS EQU CYREG_GPIO_PRT0_PS
SW_Tx_UART_tx__0__SHIFT EQU 5
SW_Tx_UART_tx__DR EQU CYREG_GPIO_PRT0_DR
SW_Tx_UART_tx__DR_CLR EQU CYREG_GPIO_PRT0_DR_CLR
SW_Tx_UART_tx__DR_INV EQU CYREG_GPIO_PRT0_DR_INV
SW_Tx_UART_tx__DR_SET EQU CYREG_GPIO_PRT0_DR_SET
SW_Tx_UART_tx__INTCFG EQU CYREG_GPIO_PRT0_INTR_CFG
SW_Tx_UART_tx__INTR EQU CYREG_GPIO_PRT0_INTR
SW_Tx_UART_tx__INTR_CFG EQU CYREG_GPIO_PRT0_INTR_CFG
SW_Tx_UART_tx__INTSTAT EQU CYREG_GPIO_PRT0_INTR
SW_Tx_UART_tx__MASK EQU 0x20
SW_Tx_UART_tx__PA__CFG0 EQU CYREG_UDB_PA0_CFG0
SW_Tx_UART_tx__PA__CFG1 EQU CYREG_UDB_PA0_CFG1
SW_Tx_UART_tx__PA__CFG10 EQU CYREG_UDB_PA0_CFG10
SW_Tx_UART_tx__PA__CFG11 EQU CYREG_UDB_PA0_CFG11
SW_Tx_UART_tx__PA__CFG12 EQU CYREG_UDB_PA0_CFG12
SW_Tx_UART_tx__PA__CFG13 EQU CYREG_UDB_PA0_CFG13
SW_Tx_UART_tx__PA__CFG14 EQU CYREG_UDB_PA0_CFG14
SW_Tx_UART_tx__PA__CFG2 EQU CYREG_UDB_PA0_CFG2
SW_Tx_UART_tx__PA__CFG3 EQU CYREG_UDB_PA0_CFG3
SW_Tx_UART_tx__PA__CFG4 EQU CYREG_UDB_PA0_CFG4
SW_Tx_UART_tx__PA__CFG5 EQU CYREG_UDB_PA0_CFG5
SW_Tx_UART_tx__PA__CFG6 EQU CYREG_UDB_PA0_CFG6
SW_Tx_UART_tx__PA__CFG7 EQU CYREG_UDB_PA0_CFG7
SW_Tx_UART_tx__PA__CFG8 EQU CYREG_UDB_PA0_CFG8
SW_Tx_UART_tx__PA__CFG9 EQU CYREG_UDB_PA0_CFG9
SW_Tx_UART_tx__PC EQU CYREG_GPIO_PRT0_PC
SW_Tx_UART_tx__PC2 EQU CYREG_GPIO_PRT0_PC2
SW_Tx_UART_tx__PORT EQU 0
SW_Tx_UART_tx__PS EQU CYREG_GPIO_PRT0_PS
SW_Tx_UART_tx__SHIFT EQU 5

/* ADC_SAR_SEQ_cy_psoc4_sar */
ADC_SAR_SEQ_cy_psoc4_sar__SAR_CTRL EQU CYREG_SAR_CTRL
ADC_SAR_SEQ_cy_psoc4_sar__SAR_INTR EQU CYREG_SAR_INTR
ADC_SAR_SEQ_cy_psoc4_sar__SAR_INTR_CAUSE EQU CYREG_SAR_INTR_CAUSE
ADC_SAR_SEQ_cy_psoc4_sar__SAR_INTR_MASK EQU CYREG_SAR_INTR_MASK
ADC_SAR_SEQ_cy_psoc4_sar__SAR_INTR_MASKED EQU CYREG_SAR_INTR_MASKED
ADC_SAR_SEQ_cy_psoc4_sar__SAR_INTR_SET EQU CYREG_SAR_INTR_SET
ADC_SAR_SEQ_cy_psoc4_sar__SAR_NUMBER EQU 0
ADC_SAR_SEQ_cy_psoc4_sar__SAR_RANGE_COND EQU CYREG_SAR_RANGE_COND
ADC_SAR_SEQ_cy_psoc4_sar__SAR_RANGE_INTR_MASK EQU CYREG_SAR_RANGE_INTR_MASK
ADC_SAR_SEQ_cy_psoc4_sar__SAR_RANGE_INTR_MASKED EQU CYREG_SAR_RANGE_INTR_MASKED
ADC_SAR_SEQ_cy_psoc4_sar__SAR_RANGE_INTR_SET EQU CYREG_SAR_RANGE_INTR_SET
ADC_SAR_SEQ_cy_psoc4_sar__SAR_RANGE_THRES EQU CYREG_SAR_RANGE_THRES
ADC_SAR_SEQ_cy_psoc4_sar__SAR_SAMPLE_CTRL EQU CYREG_SAR_SAMPLE_CTRL
ADC_SAR_SEQ_cy_psoc4_sar__SAR_SAMPLE_TIME01 EQU CYREG_SAR_SAMPLE_TIME01
ADC_SAR_SEQ_cy_psoc4_sar__SAR_SAMPLE_TIME23 EQU CYREG_SAR_SAMPLE_TIME23
ADC_SAR_SEQ_cy_psoc4_sar__SAR_SATURATE_INTR_MASK EQU CYREG_SAR_SATURATE_INTR_MASK
ADC_SAR_SEQ_cy_psoc4_sar__SAR_SATURATE_INTR_MASKED EQU CYREG_SAR_SATURATE_INTR_MASKED
ADC_SAR_SEQ_cy_psoc4_sar__SAR_SATURATE_INTR_SET EQU CYREG_SAR_SATURATE_INTR_SET
ADC_SAR_SEQ_cy_psoc4_sar__SAR_STATUS EQU CYREG_SAR_STATUS

/* ADC_SAR_SEQ_intClock */
ADC_SAR_SEQ_intClock__CTRL_REGISTER EQU CYREG_PERI_PCLK_CTL6
ADC_SAR_SEQ_intClock__DIV_ID EQU 0x00000045
ADC_SAR_SEQ_intClock__DIV_REGISTER EQU CYREG_PERI_DIV_16_CTL5
ADC_SAR_SEQ_intClock__PA_DIV_ID EQU 0x000000FF

/* ADC_SAR_SEQ_IRQ */
ADC_SAR_SEQ_IRQ__INTC_CLR_EN_REG EQU CYREG_CM0_ICER
ADC_SAR_SEQ_IRQ__INTC_CLR_PD_REG EQU CYREG_CM0_ICPR
ADC_SAR_SEQ_IRQ__INTC_MASK EQU 0x8000
ADC_SAR_SEQ_IRQ__INTC_NUMBER EQU 15
ADC_SAR_SEQ_IRQ__INTC_PRIOR_MASK EQU 0xC0000000
ADC_SAR_SEQ_IRQ__INTC_PRIOR_NUM EQU 3
ADC_SAR_SEQ_IRQ__INTC_PRIOR_REG EQU CYREG_CM0_IPR3
ADC_SAR_SEQ_IRQ__INTC_SET_EN_REG EQU CYREG_CM0_ISER
ADC_SAR_SEQ_IRQ__INTC_SET_PD_REG EQU CYREG_CM0_ISPR

/* CSD_Touchpad_Cmod */
CSD_Touchpad_Cmod__0__DR EQU CYREG_GPIO_PRT4_DR
CSD_Touchpad_Cmod__0__DR_CLR EQU CYREG_GPIO_PRT4_DR_CLR
CSD_Touchpad_Cmod__0__DR_INV EQU CYREG_GPIO_PRT4_DR_INV
CSD_Touchpad_Cmod__0__DR_SET EQU CYREG_GPIO_PRT4_DR_SET
CSD_Touchpad_Cmod__0__HSIOM EQU CYREG_HSIOM_PORT_SEL4
CSD_Touchpad_Cmod__0__HSIOM_MASK EQU 0x0000000F
CSD_Touchpad_Cmod__0__HSIOM_SHIFT EQU 0
CSD_Touchpad_Cmod__0__INTCFG EQU CYREG_GPIO_PRT4_INTR_CFG
CSD_Touchpad_Cmod__0__INTR EQU CYREG_GPIO_PRT4_INTR
CSD_Touchpad_Cmod__0__INTR_CFG EQU CYREG_GPIO_PRT4_INTR_CFG
CSD_Touchpad_Cmod__0__INTSTAT EQU CYREG_GPIO_PRT4_INTR
CSD_Touchpad_Cmod__0__MASK EQU 0x01
CSD_Touchpad_Cmod__0__PC EQU CYREG_GPIO_PRT4_PC
CSD_Touchpad_Cmod__0__PC2 EQU CYREG_GPIO_PRT4_PC2
CSD_Touchpad_Cmod__0__PORT EQU 4
CSD_Touchpad_Cmod__0__PS EQU CYREG_GPIO_PRT4_PS
CSD_Touchpad_Cmod__0__SHIFT EQU 0
CSD_Touchpad_Cmod__Cmod__DR EQU CYREG_GPIO_PRT4_DR
CSD_Touchpad_Cmod__Cmod__DR_CLR EQU CYREG_GPIO_PRT4_DR_CLR
CSD_Touchpad_Cmod__Cmod__DR_INV EQU CYREG_GPIO_PRT4_DR_INV
CSD_Touchpad_Cmod__Cmod__DR_SET EQU CYREG_GPIO_PRT4_DR_SET
CSD_Touchpad_Cmod__Cmod__INTCFG EQU CYREG_GPIO_PRT4_INTR_CFG
CSD_Touchpad_Cmod__Cmod__INTR EQU CYREG_GPIO_PRT4_INTR
CSD_Touchpad_Cmod__Cmod__INTR_CFG EQU CYREG_GPIO_PRT4_INTR_CFG
CSD_Touchpad_Cmod__Cmod__INTSTAT EQU CYREG_GPIO_PRT4_INTR
CSD_Touchpad_Cmod__Cmod__MASK EQU 0x01
CSD_Touchpad_Cmod__Cmod__PC EQU CYREG_GPIO_PRT4_PC
CSD_Touchpad_Cmod__Cmod__PC2 EQU CYREG_GPIO_PRT4_PC2
CSD_Touchpad_Cmod__Cmod__PORT EQU 4
CSD_Touchpad_Cmod__Cmod__PS EQU CYREG_GPIO_PRT4_PS
CSD_Touchpad_Cmod__Cmod__SHIFT EQU 0
CSD_Touchpad_Cmod__DR EQU CYREG_GPIO_PRT4_DR
CSD_Touchpad_Cmod__DR_CLR EQU CYREG_GPIO_PRT4_DR_CLR
CSD_Touchpad_Cmod__DR_INV EQU CYREG_GPIO_PRT4_DR_INV
CSD_Touchpad_Cmod__DR_SET EQU CYREG_GPIO_PRT4_DR_SET
CSD_Touchpad_Cmod__INTCFG EQU CYREG_GPIO_PRT4_INTR_CFG
CSD_Touchpad_Cmod__INTR EQU CYREG_GPIO_PRT4_INTR
CSD_Touchpad_Cmod__INTR_CFG EQU CYREG_GPIO_PRT4_INTR_CFG
CSD_Touchpad_Cmod__INTSTAT EQU CYREG_GPIO_PRT4_INTR
CSD_Touchpad_Cmod__MASK EQU 0x01
CSD_Touchpad_Cmod__PC EQU CYREG_GPIO_PRT4_PC
CSD_Touchpad_Cmod__PC2 EQU CYREG_GPIO_PRT4_PC2
CSD_Touchpad_Cmod__PORT EQU 4
CSD_Touchpad_Cmod__PS EQU CYREG_GPIO_PRT4_PS
CSD_Touchpad_Cmod__SHIFT EQU 0

/* CSD_Touchpad_CSD_FFB */
CSD_Touchpad_CSD_FFB__CSD_CONFIG EQU CYREG_CSD_CONFIG
CSD_Touchpad_CSD_FFB__CSD_COUNTER EQU CYREG_CSD_COUNTER
CSD_Touchpad_CSD_FFB__CSD_ID EQU CYREG_CSD_ID
CSD_Touchpad_CSD_FFB__CSD_INTR EQU CYREG_CSD_INTR
CSD_Touchpad_CSD_FFB__CSD_INTR_SET EQU CYREG_CSD_INTR_SET
CSD_Touchpad_CSD_FFB__CSD_NUMBER EQU 0
CSD_Touchpad_CSD_FFB__CSD_PWM EQU CYREG_CSD_PWM
CSD_Touchpad_CSD_FFB__CSD_STATUS EQU CYREG_CSD_STATUS

/* CSD_Touchpad_IDAC1_cy_psoc4_idac */
CSD_Touchpad_IDAC1_cy_psoc4_idac__CONTROL EQU CYREG_CSD_CONFIG
CSD_Touchpad_IDAC1_cy_psoc4_idac__CSD_IDAC EQU CYREG_CSD_IDAC
CSD_Touchpad_IDAC1_cy_psoc4_idac__CSD_IDAC_SHIFT EQU 0
CSD_Touchpad_IDAC1_cy_psoc4_idac__CSD_TRIM1 EQU CYREG_CSD_TRIM1
CSD_Touchpad_IDAC1_cy_psoc4_idac__CSD_TRIM1_SHIFT EQU 0
CSD_Touchpad_IDAC1_cy_psoc4_idac__CSD_TRIM2 EQU CYREG_CSD_TRIM2
CSD_Touchpad_IDAC1_cy_psoc4_idac__CSD_TRIM2_SHIFT EQU 0
CSD_Touchpad_IDAC1_cy_psoc4_idac__IDAC_NUMBER EQU 1
CSD_Touchpad_IDAC1_cy_psoc4_idac__POLARITY EQU CYREG_CSD_CONFIG
CSD_Touchpad_IDAC1_cy_psoc4_idac__POLARITY_SHIFT EQU 16

/* CSD_Touchpad_IDAC2_cy_psoc4_idac */
CSD_Touchpad_IDAC2_cy_psoc4_idac__CONTROL EQU CYREG_CSD_CONFIG
CSD_Touchpad_IDAC2_cy_psoc4_idac__CSD_IDAC EQU CYREG_CSD_IDAC
CSD_Touchpad_IDAC2_cy_psoc4_idac__CSD_IDAC_SHIFT EQU 16
CSD_Touchpad_IDAC2_cy_psoc4_idac__CSD_TRIM1 EQU CYREG_CSD_TRIM1
CSD_Touchpad_IDAC2_cy_psoc4_idac__CSD_TRIM1_SHIFT EQU 4
CSD_Touchpad_IDAC2_cy_psoc4_idac__CSD_TRIM2 EQU CYREG_CSD_TRIM2
CSD_Touchpad_IDAC2_cy_psoc4_idac__CSD_TRIM2_SHIFT EQU 4
CSD_Touchpad_IDAC2_cy_psoc4_idac__IDAC_NUMBER EQU 2
CSD_Touchpad_IDAC2_cy_psoc4_idac__POLARITY EQU CYREG_CSD_CONFIG
CSD_Touchpad_IDAC2_cy_psoc4_idac__POLARITY_SHIFT EQU 17

/* CSD_Touchpad_ISR */
CSD_Touchpad_ISR__INTC_CLR_EN_REG EQU CYREG_CM0_ICER
CSD_Touchpad_ISR__INTC_CLR_PD_REG EQU CYREG_CM0_ICPR
CSD_Touchpad_ISR__INTC_MASK EQU 0x10000
CSD_Touchpad_ISR__INTC_NUMBER EQU 16
CSD_Touchpad_ISR__INTC_PRIOR_MASK EQU 0xC0
CSD_Touchpad_ISR__INTC_PRIOR_NUM EQU 3
CSD_Touchpad_ISR__INTC_PRIOR_REG EQU CYREG_CM0_IPR4
CSD_Touchpad_ISR__INTC_SET_EN_REG EQU CYREG_CM0_ISER
CSD_Touchpad_ISR__INTC_SET_PD_REG EQU CYREG_CM0_ISPR

/* CSD_Touchpad_SampleClk */
CSD_Touchpad_SampleClk__CTRL_REGISTER EQU CYREG_PERI_PCLK_CTL5
CSD_Touchpad_SampleClk__DIV_ID EQU 0x00000040
CSD_Touchpad_SampleClk__DIV_REGISTER EQU CYREG_PERI_DIV_16_CTL0
CSD_Touchpad_SampleClk__PA_DIV_ID EQU 0x000000FF

/* CSD_Touchpad_SenseClk */
CSD_Touchpad_SenseClk__CTRL_REGISTER EQU CYREG_PERI_PCLK_CTL4
CSD_Touchpad_SenseClk__DIV_ID EQU 0x00000041
CSD_Touchpad_SenseClk__DIV_REGISTER EQU CYREG_PERI_DIV_16_CTL1
CSD_Touchpad_SenseClk__PA_DIV_ID EQU 0x000000FF

/* CSD_Touchpad_Sns */
CSD_Touchpad_Sns__0__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__0__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__0__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__0__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__0__HSIOM EQU CYREG_HSIOM_PORT_SEL3
CSD_Touchpad_Sns__0__HSIOM_MASK EQU 0x0000F000
CSD_Touchpad_Sns__0__HSIOM_SHIFT EQU 12
CSD_Touchpad_Sns__0__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__0__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__0__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__0__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__0__MASK EQU 0x08
CSD_Touchpad_Sns__0__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__0__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__0__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__0__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__0__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__0__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__0__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__0__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__0__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__0__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__0__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__0__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__0__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__0__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__0__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__0__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__0__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__0__PORT EQU 3
CSD_Touchpad_Sns__0__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__0__SHIFT EQU 3
CSD_Touchpad_Sns__1__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__1__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__1__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__1__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__1__HSIOM EQU CYREG_HSIOM_PORT_SEL3
CSD_Touchpad_Sns__1__HSIOM_MASK EQU 0x000F0000
CSD_Touchpad_Sns__1__HSIOM_SHIFT EQU 16
CSD_Touchpad_Sns__1__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__1__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__1__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__1__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__1__MASK EQU 0x10
CSD_Touchpad_Sns__1__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__1__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__1__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__1__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__1__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__1__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__1__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__1__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__1__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__1__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__1__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__1__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__1__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__1__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__1__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__1__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__1__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__1__PORT EQU 3
CSD_Touchpad_Sns__1__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__1__SHIFT EQU 4
CSD_Touchpad_Sns__2__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__2__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__2__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__2__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__2__HSIOM EQU CYREG_HSIOM_PORT_SEL3
CSD_Touchpad_Sns__2__HSIOM_MASK EQU 0x00F00000
CSD_Touchpad_Sns__2__HSIOM_SHIFT EQU 20
CSD_Touchpad_Sns__2__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__2__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__2__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__2__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__2__MASK EQU 0x20
CSD_Touchpad_Sns__2__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__2__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__2__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__2__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__2__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__2__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__2__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__2__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__2__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__2__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__2__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__2__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__2__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__2__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__2__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__2__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__2__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__2__PORT EQU 3
CSD_Touchpad_Sns__2__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__2__SHIFT EQU 5
CSD_Touchpad_Sns__3__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__3__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__3__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__3__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__3__HSIOM EQU CYREG_HSIOM_PORT_SEL3
CSD_Touchpad_Sns__3__HSIOM_MASK EQU 0x0F000000
CSD_Touchpad_Sns__3__HSIOM_SHIFT EQU 24
CSD_Touchpad_Sns__3__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__3__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__3__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__3__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__3__MASK EQU 0x40
CSD_Touchpad_Sns__3__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__3__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__3__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__3__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__3__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__3__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__3__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__3__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__3__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__3__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__3__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__3__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__3__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__3__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__3__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__3__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__3__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__3__PORT EQU 3
CSD_Touchpad_Sns__3__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__3__SHIFT EQU 6
CSD_Touchpad_Sns__4__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__4__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__4__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__4__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__4__HSIOM EQU CYREG_HSIOM_PORT_SEL3
CSD_Touchpad_Sns__4__HSIOM_MASK EQU 0xF0000000
CSD_Touchpad_Sns__4__HSIOM_SHIFT EQU 28
CSD_Touchpad_Sns__4__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__4__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__4__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__4__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__4__MASK EQU 0x80
CSD_Touchpad_Sns__4__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__4__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__4__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__4__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__4__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__4__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__4__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__4__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__4__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__4__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__4__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__4__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__4__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__4__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__4__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__4__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__4__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__4__PORT EQU 3
CSD_Touchpad_Sns__4__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__4__SHIFT EQU 7
CSD_Touchpad_Sns__5__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__5__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__5__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__5__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__5__HSIOM EQU CYREG_HSIOM_PORT_SEL3
CSD_Touchpad_Sns__5__HSIOM_MASK EQU 0x00000F00
CSD_Touchpad_Sns__5__HSIOM_SHIFT EQU 8
CSD_Touchpad_Sns__5__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__5__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__5__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__5__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__5__MASK EQU 0x04
CSD_Touchpad_Sns__5__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__5__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__5__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__5__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__5__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__5__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__5__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__5__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__5__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__5__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__5__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__5__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__5__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__5__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__5__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__5__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__5__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__5__PORT EQU 3
CSD_Touchpad_Sns__5__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__5__SHIFT EQU 2
CSD_Touchpad_Sns__6__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__6__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__6__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__6__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__6__HSIOM EQU CYREG_HSIOM_PORT_SEL3
CSD_Touchpad_Sns__6__HSIOM_MASK EQU 0x000000F0
CSD_Touchpad_Sns__6__HSIOM_SHIFT EQU 4
CSD_Touchpad_Sns__6__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__6__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__6__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__6__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__6__MASK EQU 0x02
CSD_Touchpad_Sns__6__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__6__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__6__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__6__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__6__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__6__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__6__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__6__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__6__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__6__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__6__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__6__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__6__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__6__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__6__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__6__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__6__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__6__PORT EQU 3
CSD_Touchpad_Sns__6__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__6__SHIFT EQU 1
CSD_Touchpad_Sns__7__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__7__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__7__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__7__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__7__HSIOM EQU CYREG_HSIOM_PORT_SEL3
CSD_Touchpad_Sns__7__HSIOM_MASK EQU 0x0000000F
CSD_Touchpad_Sns__7__HSIOM_SHIFT EQU 0
CSD_Touchpad_Sns__7__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__7__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__7__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__7__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__7__MASK EQU 0x01
CSD_Touchpad_Sns__7__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__7__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__7__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__7__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__7__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__7__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__7__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__7__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__7__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__7__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__7__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__7__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__7__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__7__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__7__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__7__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__7__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__7__PORT EQU 3
CSD_Touchpad_Sns__7__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__7__SHIFT EQU 0
CSD_Touchpad_Sns__8__DR EQU CYREG_GPIO_PRT2_DR
CSD_Touchpad_Sns__8__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
CSD_Touchpad_Sns__8__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
CSD_Touchpad_Sns__8__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
CSD_Touchpad_Sns__8__HSIOM EQU CYREG_HSIOM_PORT_SEL2
CSD_Touchpad_Sns__8__HSIOM_MASK EQU 0xF0000000
CSD_Touchpad_Sns__8__HSIOM_SHIFT EQU 28
CSD_Touchpad_Sns__8__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
CSD_Touchpad_Sns__8__INTR EQU CYREG_GPIO_PRT2_INTR
CSD_Touchpad_Sns__8__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
CSD_Touchpad_Sns__8__INTSTAT EQU CYREG_GPIO_PRT2_INTR
CSD_Touchpad_Sns__8__MASK EQU 0x80
CSD_Touchpad_Sns__8__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
CSD_Touchpad_Sns__8__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
CSD_Touchpad_Sns__8__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
CSD_Touchpad_Sns__8__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
CSD_Touchpad_Sns__8__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
CSD_Touchpad_Sns__8__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
CSD_Touchpad_Sns__8__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
CSD_Touchpad_Sns__8__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
CSD_Touchpad_Sns__8__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
CSD_Touchpad_Sns__8__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
CSD_Touchpad_Sns__8__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
CSD_Touchpad_Sns__8__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
CSD_Touchpad_Sns__8__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
CSD_Touchpad_Sns__8__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
CSD_Touchpad_Sns__8__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
CSD_Touchpad_Sns__8__PC EQU CYREG_GPIO_PRT2_PC
CSD_Touchpad_Sns__8__PC2 EQU CYREG_GPIO_PRT2_PC2
CSD_Touchpad_Sns__8__PORT EQU 2
CSD_Touchpad_Sns__8__PS EQU CYREG_GPIO_PRT2_PS
CSD_Touchpad_Sns__8__SHIFT EQU 7
CSD_Touchpad_Sns__9__DR EQU CYREG_GPIO_PRT2_DR
CSD_Touchpad_Sns__9__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
CSD_Touchpad_Sns__9__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
CSD_Touchpad_Sns__9__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
CSD_Touchpad_Sns__9__HSIOM EQU CYREG_HSIOM_PORT_SEL2
CSD_Touchpad_Sns__9__HSIOM_MASK EQU 0x0F000000
CSD_Touchpad_Sns__9__HSIOM_SHIFT EQU 24
CSD_Touchpad_Sns__9__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
CSD_Touchpad_Sns__9__INTR EQU CYREG_GPIO_PRT2_INTR
CSD_Touchpad_Sns__9__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
CSD_Touchpad_Sns__9__INTSTAT EQU CYREG_GPIO_PRT2_INTR
CSD_Touchpad_Sns__9__MASK EQU 0x40
CSD_Touchpad_Sns__9__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
CSD_Touchpad_Sns__9__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
CSD_Touchpad_Sns__9__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
CSD_Touchpad_Sns__9__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
CSD_Touchpad_Sns__9__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
CSD_Touchpad_Sns__9__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
CSD_Touchpad_Sns__9__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
CSD_Touchpad_Sns__9__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
CSD_Touchpad_Sns__9__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
CSD_Touchpad_Sns__9__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
CSD_Touchpad_Sns__9__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
CSD_Touchpad_Sns__9__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
CSD_Touchpad_Sns__9__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
CSD_Touchpad_Sns__9__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
CSD_Touchpad_Sns__9__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
CSD_Touchpad_Sns__9__PC EQU CYREG_GPIO_PRT2_PC
CSD_Touchpad_Sns__9__PC2 EQU CYREG_GPIO_PRT2_PC2
CSD_Touchpad_Sns__9__PORT EQU 2
CSD_Touchpad_Sns__9__PS EQU CYREG_GPIO_PRT2_PS
CSD_Touchpad_Sns__9__SHIFT EQU 6
CSD_Touchpad_Sns__Trackpad_Col0__TP__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__Trackpad_Col0__TP__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__Trackpad_Col0__TP__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__Trackpad_Col0__TP__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__Trackpad_Col0__TP__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col0__TP__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col0__TP__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col0__TP__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col0__TP__MASK EQU 0x08
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__Trackpad_Col0__TP__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__Trackpad_Col0__TP__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__Trackpad_Col0__TP__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__Trackpad_Col0__TP__PORT EQU 3
CSD_Touchpad_Sns__Trackpad_Col0__TP__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__Trackpad_Col0__TP__SHIFT EQU 3
CSD_Touchpad_Sns__Trackpad_Col1__TP__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__Trackpad_Col1__TP__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__Trackpad_Col1__TP__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__Trackpad_Col1__TP__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__Trackpad_Col1__TP__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col1__TP__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col1__TP__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col1__TP__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col1__TP__MASK EQU 0x10
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__Trackpad_Col1__TP__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__Trackpad_Col1__TP__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__Trackpad_Col1__TP__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__Trackpad_Col1__TP__PORT EQU 3
CSD_Touchpad_Sns__Trackpad_Col1__TP__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__Trackpad_Col1__TP__SHIFT EQU 4
CSD_Touchpad_Sns__Trackpad_Col2__TP__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__Trackpad_Col2__TP__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__Trackpad_Col2__TP__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__Trackpad_Col2__TP__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__Trackpad_Col2__TP__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col2__TP__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col2__TP__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col2__TP__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col2__TP__MASK EQU 0x20
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__Trackpad_Col2__TP__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__Trackpad_Col2__TP__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__Trackpad_Col2__TP__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__Trackpad_Col2__TP__PORT EQU 3
CSD_Touchpad_Sns__Trackpad_Col2__TP__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__Trackpad_Col2__TP__SHIFT EQU 5
CSD_Touchpad_Sns__Trackpad_Col3__TP__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__Trackpad_Col3__TP__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__Trackpad_Col3__TP__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__Trackpad_Col3__TP__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__Trackpad_Col3__TP__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col3__TP__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col3__TP__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col3__TP__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col3__TP__MASK EQU 0x40
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__Trackpad_Col3__TP__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__Trackpad_Col3__TP__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__Trackpad_Col3__TP__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__Trackpad_Col3__TP__PORT EQU 3
CSD_Touchpad_Sns__Trackpad_Col3__TP__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__Trackpad_Col3__TP__SHIFT EQU 6
CSD_Touchpad_Sns__Trackpad_Col4__TP__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__Trackpad_Col4__TP__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__Trackpad_Col4__TP__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__Trackpad_Col4__TP__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__Trackpad_Col4__TP__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col4__TP__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col4__TP__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Col4__TP__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Col4__TP__MASK EQU 0x80
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__Trackpad_Col4__TP__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__Trackpad_Col4__TP__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__Trackpad_Col4__TP__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__Trackpad_Col4__TP__PORT EQU 3
CSD_Touchpad_Sns__Trackpad_Col4__TP__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__Trackpad_Col4__TP__SHIFT EQU 7
CSD_Touchpad_Sns__Trackpad_Row0__TP__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__Trackpad_Row0__TP__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__Trackpad_Row0__TP__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__Trackpad_Row0__TP__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__Trackpad_Row0__TP__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row0__TP__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Row0__TP__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row0__TP__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Row0__TP__MASK EQU 0x04
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__Trackpad_Row0__TP__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__Trackpad_Row0__TP__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__Trackpad_Row0__TP__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__Trackpad_Row0__TP__PORT EQU 3
CSD_Touchpad_Sns__Trackpad_Row0__TP__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__Trackpad_Row0__TP__SHIFT EQU 2
CSD_Touchpad_Sns__Trackpad_Row1__TP__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__Trackpad_Row1__TP__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__Trackpad_Row1__TP__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__Trackpad_Row1__TP__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__Trackpad_Row1__TP__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row1__TP__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Row1__TP__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row1__TP__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Row1__TP__MASK EQU 0x02
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__Trackpad_Row1__TP__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__Trackpad_Row1__TP__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__Trackpad_Row1__TP__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__Trackpad_Row1__TP__PORT EQU 3
CSD_Touchpad_Sns__Trackpad_Row1__TP__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__Trackpad_Row1__TP__SHIFT EQU 1
CSD_Touchpad_Sns__Trackpad_Row2__TP__DR EQU CYREG_GPIO_PRT3_DR
CSD_Touchpad_Sns__Trackpad_Row2__TP__DR_CLR EQU CYREG_GPIO_PRT3_DR_CLR
CSD_Touchpad_Sns__Trackpad_Row2__TP__DR_INV EQU CYREG_GPIO_PRT3_DR_INV
CSD_Touchpad_Sns__Trackpad_Row2__TP__DR_SET EQU CYREG_GPIO_PRT3_DR_SET
CSD_Touchpad_Sns__Trackpad_Row2__TP__INTCFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row2__TP__INTR EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Row2__TP__INTR_CFG EQU CYREG_GPIO_PRT3_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row2__TP__INTSTAT EQU CYREG_GPIO_PRT3_INTR
CSD_Touchpad_Sns__Trackpad_Row2__TP__MASK EQU 0x01
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG0 EQU CYREG_UDB_PA3_CFG0
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG1 EQU CYREG_UDB_PA3_CFG1
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG10 EQU CYREG_UDB_PA3_CFG10
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG11 EQU CYREG_UDB_PA3_CFG11
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG12 EQU CYREG_UDB_PA3_CFG12
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG13 EQU CYREG_UDB_PA3_CFG13
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG14 EQU CYREG_UDB_PA3_CFG14
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG2 EQU CYREG_UDB_PA3_CFG2
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG3 EQU CYREG_UDB_PA3_CFG3
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG4 EQU CYREG_UDB_PA3_CFG4
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG5 EQU CYREG_UDB_PA3_CFG5
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG6 EQU CYREG_UDB_PA3_CFG6
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG7 EQU CYREG_UDB_PA3_CFG7
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG8 EQU CYREG_UDB_PA3_CFG8
CSD_Touchpad_Sns__Trackpad_Row2__TP__PA__CFG9 EQU CYREG_UDB_PA3_CFG9
CSD_Touchpad_Sns__Trackpad_Row2__TP__PC EQU CYREG_GPIO_PRT3_PC
CSD_Touchpad_Sns__Trackpad_Row2__TP__PC2 EQU CYREG_GPIO_PRT3_PC2
CSD_Touchpad_Sns__Trackpad_Row2__TP__PORT EQU 3
CSD_Touchpad_Sns__Trackpad_Row2__TP__PS EQU CYREG_GPIO_PRT3_PS
CSD_Touchpad_Sns__Trackpad_Row2__TP__SHIFT EQU 0
CSD_Touchpad_Sns__Trackpad_Row3__TP__DR EQU CYREG_GPIO_PRT2_DR
CSD_Touchpad_Sns__Trackpad_Row3__TP__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
CSD_Touchpad_Sns__Trackpad_Row3__TP__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
CSD_Touchpad_Sns__Trackpad_Row3__TP__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
CSD_Touchpad_Sns__Trackpad_Row3__TP__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row3__TP__INTR EQU CYREG_GPIO_PRT2_INTR
CSD_Touchpad_Sns__Trackpad_Row3__TP__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row3__TP__INTSTAT EQU CYREG_GPIO_PRT2_INTR
CSD_Touchpad_Sns__Trackpad_Row3__TP__MASK EQU 0x80
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
CSD_Touchpad_Sns__Trackpad_Row3__TP__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
CSD_Touchpad_Sns__Trackpad_Row3__TP__PC EQU CYREG_GPIO_PRT2_PC
CSD_Touchpad_Sns__Trackpad_Row3__TP__PC2 EQU CYREG_GPIO_PRT2_PC2
CSD_Touchpad_Sns__Trackpad_Row3__TP__PORT EQU 2
CSD_Touchpad_Sns__Trackpad_Row3__TP__PS EQU CYREG_GPIO_PRT2_PS
CSD_Touchpad_Sns__Trackpad_Row3__TP__SHIFT EQU 7
CSD_Touchpad_Sns__Trackpad_Row4__TP__DR EQU CYREG_GPIO_PRT2_DR
CSD_Touchpad_Sns__Trackpad_Row4__TP__DR_CLR EQU CYREG_GPIO_PRT2_DR_CLR
CSD_Touchpad_Sns__Trackpad_Row4__TP__DR_INV EQU CYREG_GPIO_PRT2_DR_INV
CSD_Touchpad_Sns__Trackpad_Row4__TP__DR_SET EQU CYREG_GPIO_PRT2_DR_SET
CSD_Touchpad_Sns__Trackpad_Row4__TP__INTCFG EQU CYREG_GPIO_PRT2_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row4__TP__INTR EQU CYREG_GPIO_PRT2_INTR
CSD_Touchpad_Sns__Trackpad_Row4__TP__INTR_CFG EQU CYREG_GPIO_PRT2_INTR_CFG
CSD_Touchpad_Sns__Trackpad_Row4__TP__INTSTAT EQU CYREG_GPIO_PRT2_INTR
CSD_Touchpad_Sns__Trackpad_Row4__TP__MASK EQU 0x40
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG0 EQU CYREG_UDB_PA2_CFG0
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG1 EQU CYREG_UDB_PA2_CFG1
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG10 EQU CYREG_UDB_PA2_CFG10
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG11 EQU CYREG_UDB_PA2_CFG11
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG12 EQU CYREG_UDB_PA2_CFG12
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG13 EQU CYREG_UDB_PA2_CFG13
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG14 EQU CYREG_UDB_PA2_CFG14
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG2 EQU CYREG_UDB_PA2_CFG2
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG3 EQU CYREG_UDB_PA2_CFG3
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG4 EQU CYREG_UDB_PA2_CFG4
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG5 EQU CYREG_UDB_PA2_CFG5
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG6 EQU CYREG_UDB_PA2_CFG6
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG7 EQU CYREG_UDB_PA2_CFG7
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG8 EQU CYREG_UDB_PA2_CFG8
CSD_Touchpad_Sns__Trackpad_Row4__TP__PA__CFG9 EQU CYREG_UDB_PA2_CFG9
CSD_Touchpad_Sns__Trackpad_Row4__TP__PC EQU CYREG_GPIO_PRT2_PC
CSD_Touchpad_Sns__Trackpad_Row4__TP__PC2 EQU CYREG_GPIO_PRT2_PC2
CSD_Touchpad_Sns__Trackpad_Row4__TP__PORT EQU 2
CSD_Touchpad_Sns__Trackpad_Row4__TP__PS EQU CYREG_GPIO_PRT2_PS
CSD_Touchpad_Sns__Trackpad_Row4__TP__SHIFT EQU 6

/* Keyboard_Rows */
Keyboard_Rows__0__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Rows__0__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Rows__0__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Rows__0__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Rows__0__HSIOM EQU CYREG_HSIOM_PORT_SEL1
Keyboard_Rows__0__HSIOM_MASK EQU 0x0000F000
Keyboard_Rows__0__HSIOM_SHIFT EQU 12
Keyboard_Rows__0__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__0__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__0__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__0__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__0__MASK EQU 0x08
Keyboard_Rows__0__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Rows__0__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Rows__0__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Rows__0__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Rows__0__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Rows__0__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Rows__0__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Rows__0__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Rows__0__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Rows__0__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Rows__0__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Rows__0__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Rows__0__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Rows__0__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Rows__0__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Rows__0__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Rows__0__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Rows__0__PORT EQU 1
Keyboard_Rows__0__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Rows__0__SHIFT EQU 3
Keyboard_Rows__1__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Rows__1__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Rows__1__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Rows__1__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Rows__1__HSIOM EQU CYREG_HSIOM_PORT_SEL1
Keyboard_Rows__1__HSIOM_MASK EQU 0x000F0000
Keyboard_Rows__1__HSIOM_SHIFT EQU 16
Keyboard_Rows__1__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__1__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__1__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__1__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__1__MASK EQU 0x10
Keyboard_Rows__1__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Rows__1__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Rows__1__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Rows__1__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Rows__1__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Rows__1__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Rows__1__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Rows__1__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Rows__1__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Rows__1__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Rows__1__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Rows__1__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Rows__1__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Rows__1__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Rows__1__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Rows__1__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Rows__1__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Rows__1__PORT EQU 1
Keyboard_Rows__1__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Rows__1__SHIFT EQU 4
Keyboard_Rows__2__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Rows__2__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Rows__2__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Rows__2__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Rows__2__HSIOM EQU CYREG_HSIOM_PORT_SEL1
Keyboard_Rows__2__HSIOM_MASK EQU 0x00F00000
Keyboard_Rows__2__HSIOM_SHIFT EQU 20
Keyboard_Rows__2__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__2__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__2__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__2__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__2__MASK EQU 0x20
Keyboard_Rows__2__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Rows__2__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Rows__2__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Rows__2__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Rows__2__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Rows__2__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Rows__2__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Rows__2__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Rows__2__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Rows__2__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Rows__2__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Rows__2__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Rows__2__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Rows__2__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Rows__2__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Rows__2__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Rows__2__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Rows__2__PORT EQU 1
Keyboard_Rows__2__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Rows__2__SHIFT EQU 5
Keyboard_Rows__3__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Rows__3__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Rows__3__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Rows__3__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Rows__3__HSIOM EQU CYREG_HSIOM_PORT_SEL1
Keyboard_Rows__3__HSIOM_MASK EQU 0x0F000000
Keyboard_Rows__3__HSIOM_SHIFT EQU 24
Keyboard_Rows__3__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__3__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__3__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__3__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__3__MASK EQU 0x40
Keyboard_Rows__3__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Rows__3__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Rows__3__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Rows__3__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Rows__3__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Rows__3__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Rows__3__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Rows__3__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Rows__3__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Rows__3__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Rows__3__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Rows__3__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Rows__3__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Rows__3__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Rows__3__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Rows__3__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Rows__3__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Rows__3__PORT EQU 1
Keyboard_Rows__3__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Rows__3__SHIFT EQU 6
Keyboard_Rows__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Rows__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Rows__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Rows__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Rows__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Rows__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Rows__MASK EQU 0x78
Keyboard_Rows__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Rows__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Rows__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Rows__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Rows__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Rows__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Rows__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Rows__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Rows__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Rows__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Rows__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Rows__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Rows__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Rows__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Rows__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Rows__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Rows__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Rows__PORT EQU 1
Keyboard_Rows__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Rows__SHIFT EQU 3

/* Keyboard_Columns */
Keyboard_Columns__0__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Columns__0__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Columns__0__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Columns__0__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Columns__0__HSIOM EQU CYREG_HSIOM_PORT_SEL1
Keyboard_Columns__0__HSIOM_MASK EQU 0x0000000F
Keyboard_Columns__0__HSIOM_SHIFT EQU 0
Keyboard_Columns__0__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Columns__0__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Columns__0__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Columns__0__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Columns__0__MASK EQU 0x01
Keyboard_Columns__0__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Columns__0__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Columns__0__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Columns__0__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Columns__0__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Columns__0__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Columns__0__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Columns__0__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Columns__0__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Columns__0__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Columns__0__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Columns__0__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Columns__0__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Columns__0__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Columns__0__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Columns__0__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Columns__0__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Columns__0__PORT EQU 1
Keyboard_Columns__0__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Columns__0__SHIFT EQU 0
Keyboard_Columns__1__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Columns__1__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Columns__1__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Columns__1__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Columns__1__HSIOM EQU CYREG_HSIOM_PORT_SEL1
Keyboard_Columns__1__HSIOM_MASK EQU 0x000000F0
Keyboard_Columns__1__HSIOM_SHIFT EQU 4
Keyboard_Columns__1__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Columns__1__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Columns__1__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Columns__1__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Columns__1__MASK EQU 0x02
Keyboard_Columns__1__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Columns__1__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Columns__1__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Columns__1__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Columns__1__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Columns__1__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Columns__1__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Columns__1__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Columns__1__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Columns__1__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Columns__1__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Columns__1__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Columns__1__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Columns__1__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Columns__1__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Columns__1__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Columns__1__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Columns__1__PORT EQU 1
Keyboard_Columns__1__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Columns__1__SHIFT EQU 1
Keyboard_Columns__2__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Columns__2__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Columns__2__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Columns__2__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Columns__2__HSIOM EQU CYREG_HSIOM_PORT_SEL1
Keyboard_Columns__2__HSIOM_MASK EQU 0x00000F00
Keyboard_Columns__2__HSIOM_SHIFT EQU 8
Keyboard_Columns__2__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Columns__2__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Columns__2__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Columns__2__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Columns__2__MASK EQU 0x04
Keyboard_Columns__2__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Columns__2__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Columns__2__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Columns__2__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Columns__2__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Columns__2__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Columns__2__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Columns__2__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Columns__2__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Columns__2__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Columns__2__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Columns__2__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Columns__2__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Columns__2__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Columns__2__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Columns__2__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Columns__2__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Columns__2__PORT EQU 1
Keyboard_Columns__2__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Columns__2__SHIFT EQU 2
Keyboard_Columns__DR EQU CYREG_GPIO_PRT1_DR
Keyboard_Columns__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
Keyboard_Columns__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
Keyboard_Columns__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
Keyboard_Columns__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Columns__INTR EQU CYREG_GPIO_PRT1_INTR
Keyboard_Columns__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
Keyboard_Columns__INTSTAT EQU CYREG_GPIO_PRT1_INTR
Keyboard_Columns__MASK EQU 0x07
Keyboard_Columns__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
Keyboard_Columns__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
Keyboard_Columns__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
Keyboard_Columns__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
Keyboard_Columns__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
Keyboard_Columns__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
Keyboard_Columns__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
Keyboard_Columns__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
Keyboard_Columns__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
Keyboard_Columns__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
Keyboard_Columns__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
Keyboard_Columns__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
Keyboard_Columns__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
Keyboard_Columns__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
Keyboard_Columns__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
Keyboard_Columns__PC EQU CYREG_GPIO_PRT1_PC
Keyboard_Columns__PC2 EQU CYREG_GPIO_PRT1_PC2
Keyboard_Columns__PORT EQU 1
Keyboard_Columns__PS EQU CYREG_GPIO_PRT1_PS
Keyboard_Columns__SHIFT EQU 0
Keyboard_Columns__SNAP EQU CYREG_GPIO_PRT1_INTR

/* Keyboard_Columns_Interrupt */
Keyboard_Columns_Interrupt__INTC_CLR_EN_REG EQU CYREG_CM0_ICER
Keyboard_Columns_Interrupt__INTC_CLR_PD_REG EQU CYREG_CM0_ICPR
Keyboard_Columns_Interrupt__INTC_MASK EQU 0x02
Keyboard_Columns_Interrupt__INTC_NUMBER EQU 1
Keyboard_Columns_Interrupt__INTC_PRIOR_MASK EQU 0xC000
Keyboard_Columns_Interrupt__INTC_PRIOR_NUM EQU 3
Keyboard_Columns_Interrupt__INTC_PRIOR_REG EQU CYREG_CM0_IPR0
Keyboard_Columns_Interrupt__INTC_SET_EN_REG EQU CYREG_CM0_ISER
Keyboard_Columns_Interrupt__INTC_SET_PD_REG EQU CYREG_CM0_ISPR

/* Timer_HW_Clock_1 */
Timer_HW_Clock_1__CTRL_REGISTER EQU CYREG_PERI_PCLK_CTL7
Timer_HW_Clock_1__DIV_ID EQU 0x00000042
Timer_HW_Clock_1__DIV_REGISTER EQU CYREG_PERI_DIV_16_CTL2
Timer_HW_Clock_1__PA_DIV_ID EQU 0x000000FF

/* Motion_Sensor_I2C_SCB */
Motion_Sensor_I2C_SCB__CTRL EQU CYREG_SCB1_CTRL
Motion_Sensor_I2C_SCB__EZ_DATA0 EQU CYREG_SCB1_EZ_DATA0
Motion_Sensor_I2C_SCB__EZ_DATA1 EQU CYREG_SCB1_EZ_DATA1
Motion_Sensor_I2C_SCB__EZ_DATA10 EQU CYREG_SCB1_EZ_DATA10
Motion_Sensor_I2C_SCB__EZ_DATA11 EQU CYREG_SCB1_EZ_DATA11
Motion_Sensor_I2C_SCB__EZ_DATA12 EQU CYREG_SCB1_EZ_DATA12
Motion_Sensor_I2C_SCB__EZ_DATA13 EQU CYREG_SCB1_EZ_DATA13
Motion_Sensor_I2C_SCB__EZ_DATA14 EQU CYREG_SCB1_EZ_DATA14
Motion_Sensor_I2C_SCB__EZ_DATA15 EQU CYREG_SCB1_EZ_DATA15
Motion_Sensor_I2C_SCB__EZ_DATA16 EQU CYREG_SCB1_EZ_DATA16
Motion_Sensor_I2C_SCB__EZ_DATA17 EQU CYREG_SCB1_EZ_DATA17
Motion_Sensor_I2C_SCB__EZ_DATA18 EQU CYREG_SCB1_EZ_DATA18
Motion_Sensor_I2C_SCB__EZ_DATA19 EQU CYREG_SCB1_EZ_DATA19
Motion_Sensor_I2C_SCB__EZ_DATA2 EQU CYREG_SCB1_EZ_DATA2
Motion_Sensor_I2C_SCB__EZ_DATA20 EQU CYREG_SCB1_EZ_DATA20
Motion_Sensor_I2C_SCB__EZ_DATA21 EQU CYREG_SCB1_EZ_DATA21
Motion_Sensor_I2C_SCB__EZ_DATA22 EQU CYREG_SCB1_EZ_DATA22
Motion_Sensor_I2C_SCB__EZ_DATA23 EQU CYREG_SCB1_EZ_DATA23
Motion_Sensor_I2C_SCB__EZ_DATA24 EQU CYREG_SCB1_EZ_DATA24
Motion_Sensor_I2C_SCB__EZ_DATA25 EQU CYREG_SCB1_EZ_DATA25
Motion_Sensor_I2C_SCB__EZ_DATA26 EQU CYREG_SCB1_EZ_DATA26
Motion_Sensor_I2C_SCB__EZ_DATA27 EQU CYREG_SCB1_EZ_DATA27
Motion_Sensor_I2C_SCB__EZ_DATA28 EQU CYREG_SCB1_EZ_DATA28
Motion_Sensor_I2C_SCB__EZ_DATA29 EQU CYREG_SCB1_EZ_DATA29
Motion_Sensor_I2C_SCB__EZ_DATA3 EQU CYREG_SCB1_EZ_DATA3
Motion_Sensor_I2C_SCB__EZ_DATA30 EQU CYREG_SCB1_EZ_DATA30
Motion_Sensor_I2C_SCB__EZ_DATA31 EQU CYREG_SCB1_EZ_DATA31
Motion_Sensor_I2C_SCB__EZ_DATA4 EQU CYREG_SCB1_EZ_DATA4
Motion_Sensor_I2C_SCB__EZ_DATA5 EQU CYREG_SCB1_EZ_DATA5
Motion_Sensor_I2C_SCB__EZ_DATA6 EQU CYREG_SCB1_EZ_DATA6
Motion_Sensor_I2C_SCB__EZ_DATA7 EQU CYREG_SCB1_EZ_DATA7
Motion_Sensor_I2C_SCB__EZ_DATA8 EQU CYREG_SCB1_EZ_DATA8
Motion_Sensor_I2C_SCB__EZ_DATA9 EQU CYREG_SCB1_EZ_DATA9
Motion_Sensor_I2C_SCB__I2C_CFG EQU CYREG_SCB1_I2C_CFG
Motion_Sensor_I2C_SCB__I2C_CTRL EQU CYREG_SCB1_I2C_CTRL
Motion_Sensor_I2C_SCB__I2C_M_CMD EQU CYREG_SCB1_I2C_M_CMD
Motion_Sensor_I2C_SCB__I2C_S_CMD EQU CYREG_SCB1_I2C_S_CMD
Motion_Sensor_I2C_SCB__I2C_STATUS EQU CYREG_SCB1_I2C_STATUS
Motion_Sensor_I2C_SCB__INTR_CAUSE EQU CYREG_SCB1_INTR_CAUSE
Motion_Sensor_I2C_SCB__INTR_I2C_EC EQU CYREG_SCB1_INTR_I2C_EC
Motion_Sensor_I2C_SCB__INTR_I2C_EC_MASK EQU CYREG_SCB1_INTR_I2C_EC_MASK
Motion_Sensor_I2C_SCB__INTR_I2C_EC_MASKED EQU CYREG_SCB1_INTR_I2C_EC_MASKED
Motion_Sensor_I2C_SCB__INTR_M EQU CYREG_SCB1_INTR_M
Motion_Sensor_I2C_SCB__INTR_M_MASK EQU CYREG_SCB1_INTR_M_MASK
Motion_Sensor_I2C_SCB__INTR_M_MASKED EQU CYREG_SCB1_INTR_M_MASKED
Motion_Sensor_I2C_SCB__INTR_M_SET EQU CYREG_SCB1_INTR_M_SET
Motion_Sensor_I2C_SCB__INTR_RX EQU CYREG_SCB1_INTR_RX
Motion_Sensor_I2C_SCB__INTR_RX_MASK EQU CYREG_SCB1_INTR_RX_MASK
Motion_Sensor_I2C_SCB__INTR_RX_MASKED EQU CYREG_SCB1_INTR_RX_MASKED
Motion_Sensor_I2C_SCB__INTR_RX_SET EQU CYREG_SCB1_INTR_RX_SET
Motion_Sensor_I2C_SCB__INTR_S EQU CYREG_SCB1_INTR_S
Motion_Sensor_I2C_SCB__INTR_S_MASK EQU CYREG_SCB1_INTR_S_MASK
Motion_Sensor_I2C_SCB__INTR_S_MASKED EQU CYREG_SCB1_INTR_S_MASKED
Motion_Sensor_I2C_SCB__INTR_S_SET EQU CYREG_SCB1_INTR_S_SET
Motion_Sensor_I2C_SCB__INTR_SPI_EC EQU CYREG_SCB1_INTR_SPI_EC
Motion_Sensor_I2C_SCB__INTR_SPI_EC_MASK EQU CYREG_SCB1_INTR_SPI_EC_MASK
Motion_Sensor_I2C_SCB__INTR_SPI_EC_MASKED EQU CYREG_SCB1_INTR_SPI_EC_MASKED
Motion_Sensor_I2C_SCB__INTR_TX EQU CYREG_SCB1_INTR_TX
Motion_Sensor_I2C_SCB__INTR_TX_MASK EQU CYREG_SCB1_INTR_TX_MASK
Motion_Sensor_I2C_SCB__INTR_TX_MASKED EQU CYREG_SCB1_INTR_TX_MASKED
Motion_Sensor_I2C_SCB__INTR_TX_SET EQU CYREG_SCB1_INTR_TX_SET
Motion_Sensor_I2C_SCB__RX_CTRL EQU CYREG_SCB1_RX_CTRL
Motion_Sensor_I2C_SCB__RX_FIFO_CTRL EQU CYREG_SCB1_RX_FIFO_CTRL
Motion_Sensor_I2C_SCB__RX_FIFO_RD EQU CYREG_SCB1_RX_FIFO_RD
Motion_Sensor_I2C_SCB__RX_FIFO_RD_SILENT EQU CYREG_SCB1_RX_FIFO_RD_SILENT
Motion_Sensor_I2C_SCB__RX_FIFO_STATUS EQU CYREG_SCB1_RX_FIFO_STATUS
Motion_Sensor_I2C_SCB__RX_MATCH EQU CYREG_SCB1_RX_MATCH
Motion_Sensor_I2C_SCB__SPI_CTRL EQU CYREG_SCB1_SPI_CTRL
Motion_Sensor_I2C_SCB__SPI_STATUS EQU CYREG_SCB1_SPI_STATUS
Motion_Sensor_I2C_SCB__SS0_POSISTION EQU 0
Motion_Sensor_I2C_SCB__SS1_POSISTION EQU 1
Motion_Sensor_I2C_SCB__SS2_POSISTION EQU 2
Motion_Sensor_I2C_SCB__SS3_POSISTION EQU 3
Motion_Sensor_I2C_SCB__STATUS EQU CYREG_SCB1_STATUS
Motion_Sensor_I2C_SCB__TX_CTRL EQU CYREG_SCB1_TX_CTRL
Motion_Sensor_I2C_SCB__TX_FIFO_CTRL EQU CYREG_SCB1_TX_FIFO_CTRL
Motion_Sensor_I2C_SCB__TX_FIFO_STATUS EQU CYREG_SCB1_TX_FIFO_STATUS
Motion_Sensor_I2C_SCB__TX_FIFO_WR EQU CYREG_SCB1_TX_FIFO_WR
Motion_Sensor_I2C_SCB__UART_CTRL EQU CYREG_SCB1_UART_CTRL
Motion_Sensor_I2C_SCB__UART_FLOW_CTRL EQU CYREG_SCB1_UART_FLOW_CTRL
Motion_Sensor_I2C_SCB__UART_RX_CTRL EQU CYREG_SCB1_UART_RX_CTRL
Motion_Sensor_I2C_SCB__UART_RX_STATUS EQU CYREG_SCB1_UART_RX_STATUS
Motion_Sensor_I2C_SCB__UART_TX_CTRL EQU CYREG_SCB1_UART_TX_CTRL

/* Motion_Sensor_I2C_SCB_IRQ */
Motion_Sensor_I2C_SCB_IRQ__INTC_CLR_EN_REG EQU CYREG_CM0_ICER
Motion_Sensor_I2C_SCB_IRQ__INTC_CLR_PD_REG EQU CYREG_CM0_ICPR
Motion_Sensor_I2C_SCB_IRQ__INTC_MASK EQU 0x400
Motion_Sensor_I2C_SCB_IRQ__INTC_NUMBER EQU 10
Motion_Sensor_I2C_SCB_IRQ__INTC_PRIOR_MASK EQU 0xC00000
Motion_Sensor_I2C_SCB_IRQ__INTC_PRIOR_NUM EQU 3
Motion_Sensor_I2C_SCB_IRQ__INTC_PRIOR_REG EQU CYREG_CM0_IPR2
Motion_Sensor_I2C_SCB_IRQ__INTC_SET_EN_REG EQU CYREG_CM0_ISER
Motion_Sensor_I2C_SCB_IRQ__INTC_SET_PD_REG EQU CYREG_CM0_ISPR

/* Motion_Sensor_I2C_SCBCLK */
Motion_Sensor_I2C_SCBCLK__CTRL_REGISTER EQU CYREG_PERI_PCLK_CTL2
Motion_Sensor_I2C_SCBCLK__DIV_ID EQU 0x00000044
Motion_Sensor_I2C_SCBCLK__DIV_REGISTER EQU CYREG_PERI_DIV_16_CTL4
Motion_Sensor_I2C_SCBCLK__PA_DIV_ID EQU 0x000000FF

/* Motion_Sensor_I2C_scl */
Motion_Sensor_I2C_scl__0__DR EQU CYREG_GPIO_PRT0_DR
Motion_Sensor_I2C_scl__0__DR_CLR EQU CYREG_GPIO_PRT0_DR_CLR
Motion_Sensor_I2C_scl__0__DR_INV EQU CYREG_GPIO_PRT0_DR_INV
Motion_Sensor_I2C_scl__0__DR_SET EQU CYREG_GPIO_PRT0_DR_SET
Motion_Sensor_I2C_scl__0__HSIOM EQU CYREG_HSIOM_PORT_SEL0
Motion_Sensor_I2C_scl__0__HSIOM_MASK EQU 0x000000F0
Motion_Sensor_I2C_scl__0__HSIOM_SHIFT EQU 4
Motion_Sensor_I2C_scl__0__INTCFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_I2C_scl__0__INTR EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_I2C_scl__0__INTR_CFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_I2C_scl__0__INTSTAT EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_I2C_scl__0__MASK EQU 0x02
Motion_Sensor_I2C_scl__0__PA__CFG0 EQU CYREG_UDB_PA0_CFG0
Motion_Sensor_I2C_scl__0__PA__CFG1 EQU CYREG_UDB_PA0_CFG1
Motion_Sensor_I2C_scl__0__PA__CFG10 EQU CYREG_UDB_PA0_CFG10
Motion_Sensor_I2C_scl__0__PA__CFG11 EQU CYREG_UDB_PA0_CFG11
Motion_Sensor_I2C_scl__0__PA__CFG12 EQU CYREG_UDB_PA0_CFG12
Motion_Sensor_I2C_scl__0__PA__CFG13 EQU CYREG_UDB_PA0_CFG13
Motion_Sensor_I2C_scl__0__PA__CFG14 EQU CYREG_UDB_PA0_CFG14
Motion_Sensor_I2C_scl__0__PA__CFG2 EQU CYREG_UDB_PA0_CFG2
Motion_Sensor_I2C_scl__0__PA__CFG3 EQU CYREG_UDB_PA0_CFG3
Motion_Sensor_I2C_scl__0__PA__CFG4 EQU CYREG_UDB_PA0_CFG4
Motion_Sensor_I2C_scl__0__PA__CFG5 EQU CYREG_UDB_PA0_CFG5
Motion_Sensor_I2C_scl__0__PA__CFG6 EQU CYREG_UDB_PA0_CFG6
Motion_Sensor_I2C_scl__0__PA__CFG7 EQU CYREG_UDB_PA0_CFG7
Motion_Sensor_I2C_scl__0__PA__CFG8 EQU CYREG_UDB_PA0_CFG8
Motion_Sensor_I2C_scl__0__PA__CFG9 EQU CYREG_UDB_PA0_CFG9
Motion_Sensor_I2C_scl__0__PC EQU CYREG_GPIO_PRT0_PC
Motion_Sensor_I2C_scl__0__PC2 EQU CYREG_GPIO_PRT0_PC2
Motion_Sensor_I2C_scl__0__PORT EQU 0
Motion_Sensor_I2C_scl__0__PS EQU CYREG_GPIO_PRT0_PS
Motion_Sensor_I2C_scl__0__SHIFT EQU 1
Motion_Sensor_I2C_scl__DR EQU CYREG_GPIO_PRT0_DR
Motion_Sensor_I2C_scl__DR_CLR EQU CYREG_GPIO_PRT0_DR_CLR
Motion_Sensor_I2C_scl__DR_INV EQU CYREG_GPIO_PRT0_DR_INV
Motion_Sensor_I2C_scl__DR_SET EQU CYREG_GPIO_PRT0_DR_SET
Motion_Sensor_I2C_scl__INTCFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_I2C_scl__INTR EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_I2C_scl__INTR_CFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_I2C_scl__INTSTAT EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_I2C_scl__MASK EQU 0x02
Motion_Sensor_I2C_scl__PA__CFG0 EQU CYREG_UDB_PA0_CFG0
Motion_Sensor_I2C_scl__PA__CFG1 EQU CYREG_UDB_PA0_CFG1
Motion_Sensor_I2C_scl__PA__CFG10 EQU CYREG_UDB_PA0_CFG10
Motion_Sensor_I2C_scl__PA__CFG11 EQU CYREG_UDB_PA0_CFG11
Motion_Sensor_I2C_scl__PA__CFG12 EQU CYREG_UDB_PA0_CFG12
Motion_Sensor_I2C_scl__PA__CFG13 EQU CYREG_UDB_PA0_CFG13
Motion_Sensor_I2C_scl__PA__CFG14 EQU CYREG_UDB_PA0_CFG14
Motion_Sensor_I2C_scl__PA__CFG2 EQU CYREG_UDB_PA0_CFG2
Motion_Sensor_I2C_scl__PA__CFG3 EQU CYREG_UDB_PA0_CFG3
Motion_Sensor_I2C_scl__PA__CFG4 EQU CYREG_UDB_PA0_CFG4
Motion_Sensor_I2C_scl__PA__CFG5 EQU CYREG_UDB_PA0_CFG5
Motion_Sensor_I2C_scl__PA__CFG6 EQU CYREG_UDB_PA0_CFG6
Motion_Sensor_I2C_scl__PA__CFG7 EQU CYREG_UDB_PA0_CFG7
Motion_Sensor_I2C_scl__PA__CFG8 EQU CYREG_UDB_PA0_CFG8
Motion_Sensor_I2C_scl__PA__CFG9 EQU CYREG_UDB_PA0_CFG9
Motion_Sensor_I2C_scl__PC EQU CYREG_GPIO_PRT0_PC
Motion_Sensor_I2C_scl__PC2 EQU CYREG_GPIO_PRT0_PC2
Motion_Sensor_I2C_scl__PORT EQU 0
Motion_Sensor_I2C_scl__PS EQU CYREG_GPIO_PRT0_PS
Motion_Sensor_I2C_scl__SHIFT EQU 1

/* Motion_Sensor_I2C_sda */
Motion_Sensor_I2C_sda__0__DR EQU CYREG_GPIO_PRT0_DR
Motion_Sensor_I2C_sda__0__DR_CLR EQU CYREG_GPIO_PRT0_DR_CLR
Motion_Sensor_I2C_sda__0__DR_INV EQU CYREG_GPIO_PRT0_DR_INV
Motion_Sensor_I2C_sda__0__DR_SET EQU CYREG_GPIO_PRT0_DR_SET
Motion_Sensor_I2C_sda__0__HSIOM EQU CYREG_HSIOM_PORT_SEL0
Motion_Sensor_I2C_sda__0__HSIOM_MASK EQU 0x0000000F
Motion_Sensor_I2C_sda__0__HSIOM_SHIFT EQU 0
Motion_Sensor_I2C_sda__0__INTCFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_I2C_sda__0__INTR EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_I2C_sda__0__INTR_CFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_I2C_sda__0__INTSTAT EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_I2C_sda__0__MASK EQU 0x01
Motion_Sensor_I2C_sda__0__PA__CFG0 EQU CYREG_UDB_PA0_CFG0
Motion_Sensor_I2C_sda__0__PA__CFG1 EQU CYREG_UDB_PA0_CFG1
Motion_Sensor_I2C_sda__0__PA__CFG10 EQU CYREG_UDB_PA0_CFG10
Motion_Sensor_I2C_sda__0__PA__CFG11 EQU CYREG_UDB_PA0_CFG11
Motion_Sensor_I2C_sda__0__PA__CFG12 EQU CYREG_UDB_PA0_CFG12
Motion_Sensor_I2C_sda__0__PA__CFG13 EQU CYREG_UDB_PA0_CFG13
Motion_Sensor_I2C_sda__0__PA__CFG14 EQU CYREG_UDB_PA0_CFG14
Motion_Sensor_I2C_sda__0__PA__CFG2 EQU CYREG_UDB_PA0_CFG2
Motion_Sensor_I2C_sda__0__PA__CFG3 EQU CYREG_UDB_PA0_CFG3
Motion_Sensor_I2C_sda__0__PA__CFG4 EQU CYREG_UDB_PA0_CFG4
Motion_Sensor_I2C_sda__0__PA__CFG5 EQU CYREG_UDB_PA0_CFG5
Motion_Sensor_I2C_sda__0__PA__CFG6 EQU CYREG_UDB_PA0_CFG6
Motion_Sensor_I2C_sda__0__PA__CFG7 EQU CYREG_UDB_PA0_CFG7
Motion_Sensor_I2C_sda__0__PA__CFG8 EQU CYREG_UDB_PA0_CFG8
Motion_Sensor_I2C_sda__0__PA__CFG9 EQU CYREG_UDB_PA0_CFG9
Motion_Sensor_I2C_sda__0__PC EQU CYREG_GPIO_PRT0_PC
Motion_Sensor_I2C_sda__0__PC2 EQU CYREG_GPIO_PRT0_PC2
Motion_Sensor_I2C_sda__0__PORT EQU 0
Motion_Sensor_I2C_sda__0__PS EQU CYREG_GPIO_PRT0_PS
Motion_Sensor_I2C_sda__0__SHIFT EQU 0
Motion_Sensor_I2C_sda__DR EQU CYREG_GPIO_PRT0_DR
Motion_Sensor_I2C_sda__DR_CLR EQU CYREG_GPIO_PRT0_DR_CLR
Motion_Sensor_I2C_sda__DR_INV EQU CYREG_GPIO_PRT0_DR_INV
Motion_Sensor_I2C_sda__DR_SET EQU CYREG_GPIO_PRT0_DR_SET
Motion_Sensor_I2C_sda__INTCFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_I2C_sda__INTR EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_I2C_sda__INTR_CFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_I2C_sda__INTSTAT EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_I2C_sda__MASK EQU 0x01
Motion_Sensor_I2C_sda__PA__CFG0 EQU CYREG_UDB_PA0_CFG0
Motion_Sensor_I2C_sda__PA__CFG1 EQU CYREG_UDB_PA0_CFG1
Motion_Sensor_I2C_sda__PA__CFG10 EQU CYREG_UDB_PA0_CFG10
Motion_Sensor_I2C_sda__PA__CFG11 EQU CYREG_UDB_PA0_CFG11
Motion_Sensor_I2C_sda__PA__CFG12 EQU CYREG_UDB_PA0_CFG12
Motion_Sensor_I2C_sda__PA__CFG13 EQU CYREG_UDB_PA0_CFG13
Motion_Sensor_I2C_sda__PA__CFG14 EQU CYREG_UDB_PA0_CFG14
Motion_Sensor_I2C_sda__PA__CFG2 EQU CYREG_UDB_PA0_CFG2
Motion_Sensor_I2C_sda__PA__CFG3 EQU CYREG_UDB_PA0_CFG3
Motion_Sensor_I2C_sda__PA__CFG4 EQU CYREG_UDB_PA0_CFG4
Motion_Sensor_I2C_sda__PA__CFG5 EQU CYREG_UDB_PA0_CFG5
Motion_Sensor_I2C_sda__PA__CFG6 EQU CYREG_UDB_PA0_CFG6
Motion_Sensor_I2C_sda__PA__CFG7 EQU CYREG_UDB_PA0_CFG7
Motion_Sensor_I2C_sda__PA__CFG8 EQU CYREG_UDB_PA0_CFG8
Motion_Sensor_I2C_sda__PA__CFG9 EQU CYREG_UDB_PA0_CFG9
Motion_Sensor_I2C_sda__PC EQU CYREG_GPIO_PRT0_PC
Motion_Sensor_I2C_sda__PC2 EQU CYREG_GPIO_PRT0_PC2
Motion_Sensor_I2C_sda__PORT EQU 0
Motion_Sensor_I2C_sda__PS EQU CYREG_GPIO_PRT0_PS
Motion_Sensor_I2C_sda__SHIFT EQU 0

/* Timer_HW_Interrupt_1 */
Timer_HW_Interrupt_1__INTC_CLR_EN_REG EQU CYREG_CM0_ICER
Timer_HW_Interrupt_1__INTC_CLR_PD_REG EQU CYREG_CM0_ICPR
Timer_HW_Interrupt_1__INTC_MASK EQU 0x20000
Timer_HW_Interrupt_1__INTC_NUMBER EQU 17
Timer_HW_Interrupt_1__INTC_PRIOR_MASK EQU 0xC000
Timer_HW_Interrupt_1__INTC_PRIOR_NUM EQU 3
Timer_HW_Interrupt_1__INTC_PRIOR_REG EQU CYREG_CM0_IPR4
Timer_HW_Interrupt_1__INTC_SET_EN_REG EQU CYREG_CM0_ISER
Timer_HW_Interrupt_1__INTC_SET_PD_REG EQU CYREG_CM0_ISPR

/* BatteryEn_Voice_Button */
BatteryEn_Voice_Button__0__DR EQU CYREG_GPIO_PRT1_DR
BatteryEn_Voice_Button__0__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
BatteryEn_Voice_Button__0__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
BatteryEn_Voice_Button__0__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
BatteryEn_Voice_Button__0__HSIOM EQU CYREG_HSIOM_PORT_SEL1
BatteryEn_Voice_Button__0__HSIOM_MASK EQU 0xF0000000
BatteryEn_Voice_Button__0__HSIOM_SHIFT EQU 28
BatteryEn_Voice_Button__0__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
BatteryEn_Voice_Button__0__INTR EQU CYREG_GPIO_PRT1_INTR
BatteryEn_Voice_Button__0__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
BatteryEn_Voice_Button__0__INTSTAT EQU CYREG_GPIO_PRT1_INTR
BatteryEn_Voice_Button__0__MASK EQU 0x80
BatteryEn_Voice_Button__0__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
BatteryEn_Voice_Button__0__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
BatteryEn_Voice_Button__0__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
BatteryEn_Voice_Button__0__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
BatteryEn_Voice_Button__0__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
BatteryEn_Voice_Button__0__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
BatteryEn_Voice_Button__0__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
BatteryEn_Voice_Button__0__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
BatteryEn_Voice_Button__0__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
BatteryEn_Voice_Button__0__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
BatteryEn_Voice_Button__0__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
BatteryEn_Voice_Button__0__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
BatteryEn_Voice_Button__0__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
BatteryEn_Voice_Button__0__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
BatteryEn_Voice_Button__0__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
BatteryEn_Voice_Button__0__PC EQU CYREG_GPIO_PRT1_PC
BatteryEn_Voice_Button__0__PC2 EQU CYREG_GPIO_PRT1_PC2
BatteryEn_Voice_Button__0__PORT EQU 1
BatteryEn_Voice_Button__0__PS EQU CYREG_GPIO_PRT1_PS
BatteryEn_Voice_Button__0__SHIFT EQU 7
BatteryEn_Voice_Button__DR EQU CYREG_GPIO_PRT1_DR
BatteryEn_Voice_Button__DR_CLR EQU CYREG_GPIO_PRT1_DR_CLR
BatteryEn_Voice_Button__DR_INV EQU CYREG_GPIO_PRT1_DR_INV
BatteryEn_Voice_Button__DR_SET EQU CYREG_GPIO_PRT1_DR_SET
BatteryEn_Voice_Button__INTCFG EQU CYREG_GPIO_PRT1_INTR_CFG
BatteryEn_Voice_Button__INTR EQU CYREG_GPIO_PRT1_INTR
BatteryEn_Voice_Button__INTR_CFG EQU CYREG_GPIO_PRT1_INTR_CFG
BatteryEn_Voice_Button__INTSTAT EQU CYREG_GPIO_PRT1_INTR
BatteryEn_Voice_Button__MASK EQU 0x80
BatteryEn_Voice_Button__PA__CFG0 EQU CYREG_UDB_PA1_CFG0
BatteryEn_Voice_Button__PA__CFG1 EQU CYREG_UDB_PA1_CFG1
BatteryEn_Voice_Button__PA__CFG10 EQU CYREG_UDB_PA1_CFG10
BatteryEn_Voice_Button__PA__CFG11 EQU CYREG_UDB_PA1_CFG11
BatteryEn_Voice_Button__PA__CFG12 EQU CYREG_UDB_PA1_CFG12
BatteryEn_Voice_Button__PA__CFG13 EQU CYREG_UDB_PA1_CFG13
BatteryEn_Voice_Button__PA__CFG14 EQU CYREG_UDB_PA1_CFG14
BatteryEn_Voice_Button__PA__CFG2 EQU CYREG_UDB_PA1_CFG2
BatteryEn_Voice_Button__PA__CFG3 EQU CYREG_UDB_PA1_CFG3
BatteryEn_Voice_Button__PA__CFG4 EQU CYREG_UDB_PA1_CFG4
BatteryEn_Voice_Button__PA__CFG5 EQU CYREG_UDB_PA1_CFG5
BatteryEn_Voice_Button__PA__CFG6 EQU CYREG_UDB_PA1_CFG6
BatteryEn_Voice_Button__PA__CFG7 EQU CYREG_UDB_PA1_CFG7
BatteryEn_Voice_Button__PA__CFG8 EQU CYREG_UDB_PA1_CFG8
BatteryEn_Voice_Button__PA__CFG9 EQU CYREG_UDB_PA1_CFG9
BatteryEn_Voice_Button__PC EQU CYREG_GPIO_PRT1_PC
BatteryEn_Voice_Button__PC2 EQU CYREG_GPIO_PRT1_PC2
BatteryEn_Voice_Button__PORT EQU 1
BatteryEn_Voice_Button__PS EQU CYREG_GPIO_PRT1_PS
BatteryEn_Voice_Button__SHIFT EQU 7

/* Motion_Sensor_Interrupt */
Motion_Sensor_Interrupt__INTC_CLR_EN_REG EQU CYREG_CM0_ICER
Motion_Sensor_Interrupt__INTC_CLR_PD_REG EQU CYREG_CM0_ICPR
Motion_Sensor_Interrupt__INTC_MASK EQU 0x04
Motion_Sensor_Interrupt__INTC_NUMBER EQU 2
Motion_Sensor_Interrupt__INTC_PRIOR_MASK EQU 0xC00000
Motion_Sensor_Interrupt__INTC_PRIOR_NUM EQU 3
Motion_Sensor_Interrupt__INTC_PRIOR_REG EQU CYREG_CM0_IPR0
Motion_Sensor_Interrupt__INTC_SET_EN_REG EQU CYREG_CM0_ISER
Motion_Sensor_Interrupt__INTC_SET_PD_REG EQU CYREG_CM0_ISPR

/* Motion_Sensor_Interrupt_Pin */
Motion_Sensor_Interrupt_Pin__0__DR EQU CYREG_GPIO_PRT0_DR
Motion_Sensor_Interrupt_Pin__0__DR_CLR EQU CYREG_GPIO_PRT0_DR_CLR
Motion_Sensor_Interrupt_Pin__0__DR_INV EQU CYREG_GPIO_PRT0_DR_INV
Motion_Sensor_Interrupt_Pin__0__DR_SET EQU CYREG_GPIO_PRT0_DR_SET
Motion_Sensor_Interrupt_Pin__0__HSIOM EQU CYREG_HSIOM_PORT_SEL0
Motion_Sensor_Interrupt_Pin__0__HSIOM_MASK EQU 0x00000F00
Motion_Sensor_Interrupt_Pin__0__HSIOM_SHIFT EQU 8
Motion_Sensor_Interrupt_Pin__0__INTCFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_Interrupt_Pin__0__INTR EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_Interrupt_Pin__0__INTR_CFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_Interrupt_Pin__0__INTSTAT EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_Interrupt_Pin__0__MASK EQU 0x04
Motion_Sensor_Interrupt_Pin__0__PA__CFG0 EQU CYREG_UDB_PA0_CFG0
Motion_Sensor_Interrupt_Pin__0__PA__CFG1 EQU CYREG_UDB_PA0_CFG1
Motion_Sensor_Interrupt_Pin__0__PA__CFG10 EQU CYREG_UDB_PA0_CFG10
Motion_Sensor_Interrupt_Pin__0__PA__CFG11 EQU CYREG_UDB_PA0_CFG11
Motion_Sensor_Interrupt_Pin__0__PA__CFG12 EQU CYREG_UDB_PA0_CFG12
Motion_Sensor_Interrupt_Pin__0__PA__CFG13 EQU CYREG_UDB_PA0_CFG13
Motion_Sensor_Interrupt_Pin__0__PA__CFG14 EQU CYREG_UDB_PA0_CFG14
Motion_Sensor_Interrupt_Pin__0__PA__CFG2 EQU CYREG_UDB_PA0_CFG2
Motion_Sensor_Interrupt_Pin__0__PA__CFG3 EQU CYREG_UDB_PA0_CFG3
Motion_Sensor_Interrupt_Pin__0__PA__CFG4 EQU CYREG_UDB_PA0_CFG4
Motion_Sensor_Interrupt_Pin__0__PA__CFG5 EQU CYREG_UDB_PA0_CFG5
Motion_Sensor_Interrupt_Pin__0__PA__CFG6 EQU CYREG_UDB_PA0_CFG6
Motion_Sensor_Interrupt_Pin__0__PA__CFG7 EQU CYREG_UDB_PA0_CFG7
Motion_Sensor_Interrupt_Pin__0__PA__CFG8 EQU CYREG_UDB_PA0_CFG8
Motion_Sensor_Interrupt_Pin__0__PA__CFG9 EQU CYREG_UDB_PA0_CFG9
Motion_Sensor_Interrupt_Pin__0__PC EQU CYREG_GPIO_PRT0_PC
Motion_Sensor_Interrupt_Pin__0__PC2 EQU CYREG_GPIO_PRT0_PC2
Motion_Sensor_Interrupt_Pin__0__PORT EQU 0
Motion_Sensor_Interrupt_Pin__0__PS EQU CYREG_GPIO_PRT0_PS
Motion_Sensor_Interrupt_Pin__0__SHIFT EQU 2
Motion_Sensor_Interrupt_Pin__DR EQU CYREG_GPIO_PRT0_DR
Motion_Sensor_Interrupt_Pin__DR_CLR EQU CYREG_GPIO_PRT0_DR_CLR
Motion_Sensor_Interrupt_Pin__DR_INV EQU CYREG_GPIO_PRT0_DR_INV
Motion_Sensor_Interrupt_Pin__DR_SET EQU CYREG_GPIO_PRT0_DR_SET
Motion_Sensor_Interrupt_Pin__INTCFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_Interrupt_Pin__INTR EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_Interrupt_Pin__INTR_CFG EQU CYREG_GPIO_PRT0_INTR_CFG
Motion_Sensor_Interrupt_Pin__INTSTAT EQU CYREG_GPIO_PRT0_INTR
Motion_Sensor_Interrupt_Pin__MASK EQU 0x04
Motion_Sensor_Interrupt_Pin__PA__CFG0 EQU CYREG_UDB_PA0_CFG0
Motion_Sensor_Interrupt_Pin__PA__CFG1 EQU CYREG_UDB_PA0_CFG1
Motion_Sensor_Interrupt_Pin__PA__CFG10 EQU CYREG_UDB_PA0_CFG10
Motion_Sensor_Interrupt_Pin__PA__CFG11 EQU CYREG_UDB_PA0_CFG11
Motion_Sensor_Interrupt_Pin__PA__CFG12 EQU CYREG_UDB_PA0_CFG12
Motion_Sensor_Interrupt_Pin__PA__CFG13 EQU CYREG_UDB_PA0_CFG13
Motion_Sensor_Interrupt_Pin__PA__CFG14 EQU CYREG_UDB_PA0_CFG14
Motion_Sensor_Interrupt_Pin__PA__CFG2 EQU CYREG_UDB_PA0_CFG2
Motion_Sensor_Interrupt_Pin__PA__CFG3 EQU CYREG_UDB_PA0_CFG3
Motion_Sensor_Interrupt_Pin__PA__CFG4 EQU CYREG_UDB_PA0_CFG4
Motion_Sensor_Interrupt_Pin__PA__CFG5 EQU CYREG_UDB_PA0_CFG5
Motion_Sensor_Interrupt_Pin__PA__CFG6 EQU CYREG_UDB_PA0_CFG6
Motion_Sensor_Interrupt_Pin__PA__CFG7 EQU CYREG_UDB_PA0_CFG7
Motion_Sensor_Interrupt_Pin__PA__CFG8 EQU CYREG_UDB_PA0_CFG8
Motion_Sensor_Interrupt_Pin__PA__CFG9 EQU CYREG_UDB_PA0_CFG9
Motion_Sensor_Interrupt_Pin__PC EQU CYREG_GPIO_PRT0_PC
Motion_Sensor_Interrupt_Pin__PC2 EQU CYREG_GPIO_PRT0_PC2
Motion_Sensor_Interrupt_Pin__PORT EQU 0
Motion_Sensor_Interrupt_Pin__PS EQU CYREG_GPIO_PRT0_PS
Motion_Sensor_Interrupt_Pin__SHIFT EQU 2

/* Miscellaneous */
CYDEV_BCLK__HFCLK__HZ EQU 24000000
CYDEV_BCLK__HFCLK__KHZ EQU 24000
CYDEV_BCLK__HFCLK__MHZ EQU 24
CYDEV_BCLK__SYSCLK__HZ EQU 24000000
CYDEV_BCLK__SYSCLK__KHZ EQU 24000
CYDEV_BCLK__SYSCLK__MHZ EQU 24
CYDEV_CHIP_DIE_LEOPARD EQU 1
CYDEV_CHIP_DIE_PANTHER EQU 18
CYDEV_CHIP_DIE_PSOC4A EQU 10
CYDEV_CHIP_DIE_PSOC5LP EQU 17
CYDEV_CHIP_DIE_TMA4 EQU 2
CYDEV_CHIP_DIE_UNKNOWN EQU 0
CYDEV_CHIP_FAMILY_PSOC3 EQU 1
CYDEV_CHIP_FAMILY_PSOC4 EQU 2
CYDEV_CHIP_FAMILY_PSOC5 EQU 3
CYDEV_CHIP_FAMILY_UNKNOWN EQU 0
CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC4
CYDEV_CHIP_JTAG_ID EQU 0x0E34119E
CYDEV_CHIP_MEMBER_3A EQU 1
CYDEV_CHIP_MEMBER_4A EQU 10
CYDEV_CHIP_MEMBER_4C EQU 15
CYDEV_CHIP_MEMBER_4D EQU 6
CYDEV_CHIP_MEMBER_4E EQU 4
CYDEV_CHIP_MEMBER_4F EQU 11
CYDEV_CHIP_MEMBER_4G EQU 2
CYDEV_CHIP_MEMBER_4H EQU 9
CYDEV_CHIP_MEMBER_4I EQU 14
CYDEV_CHIP_MEMBER_4J EQU 7
CYDEV_CHIP_MEMBER_4K EQU 8
CYDEV_CHIP_MEMBER_4L EQU 13
CYDEV_CHIP_MEMBER_4M EQU 12
CYDEV_CHIP_MEMBER_4N EQU 5
CYDEV_CHIP_MEMBER_4U EQU 3
CYDEV_CHIP_MEMBER_5A EQU 17
CYDEV_CHIP_MEMBER_5B EQU 16
CYDEV_CHIP_MEMBER_UNKNOWN EQU 0
CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_4F
CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_MEMBER_USED
CYDEV_CHIP_DIE_ACTUAL EQU CYDEV_CHIP_DIE_EXPECT
CYDEV_CHIP_REV_LEOPARD_ES1 EQU 0
CYDEV_CHIP_REV_LEOPARD_ES2 EQU 1
CYDEV_CHIP_REV_LEOPARD_ES3 EQU 3
CYDEV_CHIP_REV_LEOPARD_PRODUCTION EQU 3
CYDEV_CHIP_REV_PANTHER_ES0 EQU 0
CYDEV_CHIP_REV_PANTHER_ES1 EQU 1
CYDEV_CHIP_REV_PANTHER_PRODUCTION EQU 1
CYDEV_CHIP_REV_PSOC4A_ES0 EQU 17
CYDEV_CHIP_REV_PSOC4A_PRODUCTION EQU 17
CYDEV_CHIP_REV_PSOC5LP_ES0 EQU 0
CYDEV_CHIP_REV_PSOC5LP_PRODUCTION EQU 0
CYDEV_CHIP_REV_TMA4_ES EQU 17
CYDEV_CHIP_REV_TMA4_ES2 EQU 33
CYDEV_CHIP_REV_TMA4_PRODUCTION EQU 17
CYDEV_CHIP_REVISION_3A_ES1 EQU 0
CYDEV_CHIP_REVISION_3A_ES2 EQU 1
CYDEV_CHIP_REVISION_3A_ES3 EQU 3
CYDEV_CHIP_REVISION_3A_PRODUCTION EQU 3
CYDEV_CHIP_REVISION_4A_ES0 EQU 17
CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17
CYDEV_CHIP_REVISION_4C_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4D_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4E_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4F_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA EQU 0
CYDEV_CHIP_REVISION_4F_PRODUCTION_256K EQU 0
CYDEV_CHIP_REVISION_4G_ES EQU 17
CYDEV_CHIP_REVISION_4G_ES2 EQU 33
CYDEV_CHIP_REVISION_4G_PRODUCTION EQU 17
CYDEV_CHIP_REVISION_4H_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4I_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4J_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4K_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4L_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4M_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4N_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_4U_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_5A_ES0 EQU 0
CYDEV_CHIP_REVISION_5A_ES1 EQU 1
CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1
CYDEV_CHIP_REVISION_5B_ES0 EQU 0
CYDEV_CHIP_REVISION_5B_PRODUCTION EQU 0
CYDEV_CHIP_REVISION_USED EQU CYDEV_CHIP_REVISION_4F_PRODUCTION
CYDEV_CHIP_REV_EXPECT EQU CYDEV_CHIP_REVISION_USED
CYDEV_CONFIG_READ_ACCELERATOR EQU 1
CYDEV_CONFIG_UNUSED_IO_AllowButWarn EQU 0
CYDEV_CONFIG_UNUSED_IO EQU CYDEV_CONFIG_UNUSED_IO_AllowButWarn
CYDEV_CONFIG_UNUSED_IO_AllowWithInfo EQU 1
CYDEV_CONFIG_UNUSED_IO_Disallowed EQU 2
CYDEV_CONFIGURATION_COMPRESSED EQU 1
CYDEV_CONFIGURATION_MODE_COMPRESSED EQU 0
CYDEV_CONFIGURATION_MODE EQU CYDEV_CONFIGURATION_MODE_COMPRESSED
CYDEV_CONFIGURATION_MODE_DMA EQU 2
CYDEV_CONFIGURATION_MODE_UNCOMPRESSED EQU 1
CYDEV_DEBUG_PROTECT_KILL EQU 4
CYDEV_DEBUG_PROTECT_OPEN EQU 1
CYDEV_DEBUG_PROTECT EQU CYDEV_DEBUG_PROTECT_OPEN
CYDEV_DEBUG_PROTECT_PROTECTED EQU 2
CYDEV_DEBUGGING_DPS_Disable EQU 3
CYDEV_DEBUGGING_DPS EQU CYDEV_DEBUGGING_DPS_Disable
CYDEV_DEBUGGING_DPS_SWD EQU 2
CYDEV_DEBUGGING_ENABLE EQU 0
CYDEV_DFT_SELECT_CLK0 EQU 10
CYDEV_DFT_SELECT_CLK1 EQU 11
CYDEV_HEAP_SIZE EQU 0x80
CYDEV_IMO_TRIMMED_BY_USB EQU 0
CYDEV_IMO_TRIMMED_BY_WCO EQU 0
CYDEV_IS_EXPORTING_CODE EQU 0
CYDEV_IS_IMPORTING_CODE EQU 0
CYDEV_PROJ_TYPE EQU 0
CYDEV_PROJ_TYPE_BOOTLOADER EQU 1
CYDEV_PROJ_TYPE_LAUNCHER EQU 5
CYDEV_PROJ_TYPE_LOADABLE EQU 2
CYDEV_PROJ_TYPE_LOADABLEANDBOOTLOADER EQU 4
CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER EQU 3
CYDEV_PROJ_TYPE_STANDARD EQU 0
CYDEV_STACK_SIZE EQU 0x0800
CYDEV_USE_BUNDLED_CMSIS EQU 1
CYDEV_VARIABLE_VDDA EQU 1
CYDEV_VDDA_MV EQU 2200
CYDEV_VDDD_MV EQU 2200
CYDEV_VDDR_MV EQU 2200
CYDEV_WDT_GENERATE_ISR EQU 0
CYIPBLOCK_m0s8bless_VERSION EQU 1
CYIPBLOCK_m0s8cpussv2_VERSION EQU 1
CYIPBLOCK_m0s8csd_VERSION EQU 1
CYIPBLOCK_m0s8ioss_VERSION EQU 1
CYIPBLOCK_m0s8lcd_VERSION EQU 2
CYIPBLOCK_m0s8lpcomp_VERSION EQU 2
CYIPBLOCK_m0s8peri_VERSION EQU 1
CYIPBLOCK_m0s8scb_VERSION EQU 2
CYIPBLOCK_m0s8srssv2_VERSION EQU 1
CYIPBLOCK_m0s8tcpwm_VERSION EQU 2
CYIPBLOCK_m0s8udbif_VERSION EQU 1
CYIPBLOCK_s8pass4al_VERSION EQU 1
CYDEV_BOOTLOADER_ENABLE EQU 0

#endif /* INCLUDED_CYFITTERIAR_INC */
